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[AK8998/w/d] msxxxxx-e-00 - 1 - 2012/11 preliminary the AK8998 is a pressure sensor interface ic that features compensation for temperature drift and sensor variation. it is designed to excite and interface to a bridge sensor. variations in the sensor can be corrected via compensation values stored in integrated non-volatile memory (eeprom) . compensation values are obtained from measurement results for a set of offset voltages and temperature drift, along with a set of bridge voltages and temperature drift, including characteristics of the ak899 8. the AK8998 is available in a 16-pin qfn package, in wafer form and in a tray. features ? pressure sensor compensation and excitation ic (analog output) ? supply voltage current: 7.1ma max @10khz sampling ? supply voltage: 3.0v5%, 3.3v5%, 5.0v5% ? operating temperature range: -20 to 85oc ? integrated sensor output compensation (AK8998 input conversion) ? offset voltage adjustment - adjustment range: rough 13 to 373mv / fine 1 to 34mv @5.0v - adjustment step: rough 2 to 53mv /step / fine 0.01 to 0.27mv /step @5.0v ? offset voltage temperature drift adjustment (1st order coefficient) - adjustment range: 0.04 to 1.23mv/oc @5.0v - adjustment step: 0.2 to 4.8v/oc @5.0v ? output span voltage adjustment (g1, g2, g3) - total adjustment range: 5.7 to 261.6mv @5.0v - g1 adjustment step : 0.95 to 74.7mv /step @5.0v - g2 adjustment step : 5.7 to 130.8mv /step @5.0v - g3 adjustment step : 0.01 to 0.40mv /step @5.0v ? sensitivity temperature drift adjustment (1st order coefficient) - adjustment range: -4000ppm/oc to +2500ppm/oc or -2500ppm/oc to +1000 ppm/oc - adjustment step: 18ppm/oc step ? integrated output reference voltage adjustment function - adjustment range: 0.02*vdd to 0.98*vdd - adjustment step: 10mv /step @5.0v ? integrated sampling frequency switching function : 1khz, 10khz ? integrated analog circuit reference voltage stabilizer (add an external capacitor to agnd pin as needed) ? scf and smf included for band limitation: fc:1.0khz, 500hz, 250hz ? 2 wire serial interface (csclk, vout) ? ratiometric voltage output ? integrated constant voltage source for pressure sensor: 2.2v @ 3.0, 3.3v 5% 4.0v or 2.2v @ 5.0v5% ? integrated pressure detectors (x2) - detection threshold adjustment control - adjustment range: 0.125*vdd to 0.9*vdd - adjustment step: 0.025*vdd /step - detection threshold external setting function (det2 / pth pin use) - hysteresis voltage adjustment control - adjustment range: 0.03*vdd to 0.06*vdd - adjustment step: 0.01*vdd /step ? integrated reference voltage & reference current generator - vref voltage adjustment control - resolution: 3bits - adjustment step: 1% /step AK8998/w /d
[AK8998/w/d] msxxxxx-e-00 - 2 - 2012/11 - iref current adjustment control - resolution: 4bits - adjustment step: 2.8% /step typ. ? temperature sensor (internal or external) - temperature range: -20 to 85 c - internal temperature sensor output voltage adjustment control - resolution: 6 bits - adjustment step: 0.2% /step - external temperature sensor output voltage adjustment control - resolution: 9 bits rough/ fine=3/6bits - adjustment step: rough 10% /step / fine 0.2% /step - integrated external temperature sensor constant current circuit: 50a typ . ? integrated oscillator for intermittent operation (1000khz typ.) - oscillating frequency adjustment control - resolution: 4 bits - adjustment step: 5% /step typ. ? integrated eeprom for compensation values and control data storage - size: 131 bits - endurance: 1,000 times or more - retention time: 10 years or more @ta: 85 c ? supply type: tray (die), wafer, pkg (uqfn16) product name supply type comments AK8998 pkg (uqfn16) AK8998w wafer AK8998d tray (die) block diagram offset temp. track gain temp. track offset gain amplifier block vo offset_temp. gain gain_temp. gain amp.1 gain amp.2 gain amp.3 s/h & scf & level shift vn stv vp regulator vs eeprom & control register vdd track vdd vss v_ common v_bandgap v_reference i_reference lpf serial i/f power on reset pressure detector 2 det1 vout det2 / pth vout timing logic oscillator eeprom sdi/o csclk pressure detector 1 buffer & smf extmp v_temp. (internal or external) v_ common agnd
[AK8998/w/d] msxxxxx-e-00 - 3 - 2012/11 overview the AK8998 is a pressure sensor interface ic that features compensation for temperature drift and sensor variation. it is designed to excite and interface to a bridge sensor. variations in the sensor can be corrected via compensation values stored in integrated non-volatile memory (eeprom). compensation values are obtained from measurement results for a set of offset voltages and temperature drift, along with a set of bridge voltages and temperature drift, including characteristics of the AK8998. the internal compensation circuit is accomplished through a 12-bit resolution dac (r ough: 4bits, fine: 8bits) to adjust offset voltage, and the primary characteristics compensator for the associated temperature drift, coupled with 13-bit resolution (g1&g2 gain adjustment: 5bits, g3 gain adjustment: 8bits) to adjust the span voltage and another primary characteristics compensator for its associated tem perature drift. the output stage, with an internal resistor of 146k?, is band-limited with a combinat ion of external capacitors, providing a low impedance output. and the eeprom data, if used, enables the int ernal scf and smf. in this case, the band limitation is performed by the internal lpf (fc: 1khz, 500hz, 250hz), eliminating the need for the external capacitors. eeprom data can be preconfigured to enable a setup of output reference voltage, designation of the external temperature sensor (when a pressure sensor and AK8998 are separated), selection of a sampling frequency (1khz or 10khz), the input polarity, and agnd pin validation. two sets of the pressure detectors are provided. when the pressure exceeding the detection threshol d stored in the eeprom is applied, the det 1 and/or det2/pth pins go high (the polarity change is possible by eeprom). and the detection threshold can be specified externally by eeprom. in that case, the pressure detectors 2 is disabled, and the detection threshold for the pressure d etectors 1 can be defined by det2/pth pin. it can access to the eeprom and control register (volatile memory) by a t wo-wire serial interface of csclk and vout (at the time of sdi/o mode) pin.
[AK8998/w/d] msxxxxx-e-00 - 4 - 2012/11 pin configuration 1. wafer configuration 1) die size 2.082mm x 1.662mm 2) die thickness 280m 3) pad size 80m x 80m 4) pad pitch 150m< 5) scribe size 80m 6) wafer size 6 inch pin numbers and pad position no. pin name x location (m) y location (m) no. pin name x location (m) y location (m) 1 vss -894.8 687.2 9 csclk 894.8 -544.7 2 vo -894.8 337.8 10 det1 894.8 -242.5 3 vout -894.8 -344.7 11 det2/pth 894.8 -57.9 4 vdd -894.8 -687.1 12 n.c. 5 agnd -521.7 -684.8 13 vn 749.3 684.8 6 n.c. 14 vs 363.4 684.8 7 n.c. 15 vp -236.7 684.8 8 n.c. 16 extmp -716.4 684.8 pad locations (top view) 2. package outline (uqfn16) 13 vn 14 vs 15 vp 16 extmp vss 1 vo 2 vout 3 vdd 4 8 n.c. 7 n.c. 6 n.c. 5 agnd n.c. 12 det2 /pth 11 det1 10 csclk 9 (0,0) y x 11 10 9 16 1 3 4 2 15 14 13 5
[AK8998/w/d] msxxxxx-e-00 - 5 - 2012/11 adjustment characteristics 1) sensor characteristics vdd: 5v item symbol min. typ. max. units comments svs1 2.2 v evd[1:0]=1h drive voltage svs2 4.0 v evd[1:0]=0h temperature range sta -20 85 c sres1 0.82 4.00 6.50 k evd[1:0]=1h sensor resistance sres2 1.00 4.00 6.50 k evd[1:0]=0h sspnin1 12.00 44.00 76.00 mv sensor1 voltage input span range sspnin2 17.00 70.00 125.00 mv sensor2 soff1 -15.00 0.00 15.00 mv sensor1 offset voltage adjustment range soff2 -35.00 0.00 35.00 mv sensor2 sst1 -4000 2500 ppm/ c estc[0]=1h sensitivity temp. drift coefficient sst2 -2500 1000 ppm/ c estc[0]=0h sot1 -0.040 0.00 0.040 mv/ c sensor1 offset temp. drift coefficient sot2 -0.080 0.00 0.080 mv/ c sensor2 vdd:3, 3.3v item symbol min. typ. max. units comments drive voltage svs 2.2 v temperature range sta -20 85 c sensor resistance sres 0.82 4.00 6.50 k sspnin1 6.60 24.20 41.80 mv sensor1 voltage input span range sspnin2 9.00 40.00 70.00 mv sensor2 soff1 -8.25 0.00 8.25 mv sensor1 offset voltage adjustment range soff2 -19.25 0.00 19.25 mv sensor2 sst1 -4000 2500 ppm/ c estc[0]=1h sensitivity temp. drift coefficient sst2 -2500 1000 ppm/ c estc[0]=0h sot1 -0.022 0.00 0.022 mv/ c sensor1 offset temp. drift coefficient sot2 -0.044 0.00 0.044 mv/ c sensor2 note) the usage combines characteristics of senser 1/2 is not allowed. such a case as span voltage is said as the sensor 1 and except is said as the sensor 2).
[AK8998/w/d] msxxxxx-e-00 - 6 - 2012/11 2) adjustment accuracy item symbol min. typ. note4) max. note5) units comments offset adjustment accuracy cof 0.083 % fs offset temp. drift adjustment accuracy coft 0.090 % fs output span adjustment accuracy csn 0.125 % fs sensitivity temp. adjustment accuracy csnt 0.054 % fs 0.316 % fs estc[0]=1h sensitivity supply voltage and temp. variation step cstv 0.158 % fs estc[0]=0h sample and hold circuit output error cshe 0.0 % fs offset adjustment accuracy note1) cofall 0.122 1.0 % fs 0.344 1.0 % fs estc[0]=1h span adjustment accuracy note2) csnall 0.209 1.0 % fs estc[0]=0h 0.344 1.0 % fs estc[0]=1h offset adjustment accuracy note3) call 0.209 1.0 % fs estc[0]=0h note1) cofall=(cof^2+coft^2)^(1/2) note2) csnall=(csn^2+csnt^2+cstv^2+cshe^2)^(1/2) note3) call=max(cofall,csnall) note4) temp.=85oc, vdd=4.75v, g1=10x, g2=1.5x(1.176x), g3=1.8x(2.3x), offs et temp. drift 1st order coefficient=min./max., sensitivity temp. drift 1st order coefficient=m in.*1/2, vout output band-limited (500hz @fs=10khz, 50hz@fs=1khz) effective note5) temp.=-20 to 85oc, vdd=5v5%, 3.3v5%, 3.0v5%, g1/g2/g3 =min. to max., each temperature coefficient=min. to max., vout output band-limited (500hz @fs= 10khz, 50hz@fs=1khz) effective * the adjustment accuracy is based on our definition as a reference. please be aware the acc uracy of product depends on the sensor characteristics and adjustment method. 3) external temperature sensor characteristics item symbol min. typ. max. units comments sensor drive current tsdi 50 a sensor temp. variation tss -2.4 -2.2 -2.0 mv/ c 50a current drive sensor voltage @25 c tsv25 550 600 650 mv 50a current drive 4) connection of pressure sensor and external temperature sensor vn vp vs extmp AK8998
[AK8998/w/d] msxxxxx-e-00 - 7 - 2012/11 description of blocks [gain amplifier block, lpf, s/h&scf& level shifter, buffer&smf] the set of these blocks amplifies, compensates and outputs the pressure sensor level this set of blocks intermittently amplifies, compen sates, samples and holds the pressure sensor output. the output stage, with an internal resistor of 146k?, is band-limited with a combination of external capacitors, providing a low impedance outp ut. scf and smf are available for output, eliminating the need for the external capacitors. a percentage designator is used, benchmarked with 4800mvdc output at 100%, reflecting the 60x in crease in differential input from 80mvdc. block functions gain amp. 1/2/3 gain (g1/2/3) gain amp.1 is a low-noise high-gain amplifier at th e front end. the differential signal is amplified by a factor of 10x typ. (5x to 70x). gain amp.2 converts the g1 differential output to s ingle-ended with reference to agnd and amplifies by a factor of 1.5x typ. (1.5x o r 3.0x) or 1.176x typ. (1.176x or 2.352x). gain amp.3 amplifies by a factor of 1.8x typ. (1.1x to 1.8x) or 2.3x typ. (1.4x to 2.3x). g2 gain and g3 gain are changed automatically by se nsitivity temperature drift adjustment range change setup (estc [0]). span voltage is adjusted with g1/2/3 gain (g1/2: ro ugh adjustment, g3: fine adjustment). offset_temp. offset offset temp. track (g2) the preloaded compensation data in the eeprom enabl es the pressure sensor offset voltage and offset temperature drift to be c ompensated. the following adjustment value is AK8998 input conversion @5.0v. offset adj.adj. range rough 13 to 373mv / fin e 1 to 34mv adj. step rough 2 to 53mv /step / fine 0.01 to 0.27 mv /step offset temp. drift. adj. adj. range 0.04 to 1 .23mv/ oc adj. step 0.2 to 4.8v/oc step stv vdd track gain_temp. (stv) supply voltage and sensitivity temperature variatio n compensation circuit. monitors the agnd voltage to calculate the magnitud e of supply voltage variation; the pressure sensor sensitivity temperature drift i s calculated for entry into g3 using the temperature sensor output voltage and pre loaded compensation data (eeprom data). the sensitivity temperature drift ad justment range can be changed by eeprom data (estc[0]). sensitivity temp. drift. adj. adj. range -4000p pm/ oc to +2500ppm/ oc or -2500ppm/ oc to +1000ppm/ oc adj. step 18ppm/ oc step lpf anti-aliasing filter to eliminate the fold-back noi se generated in the sample-and-hold circuit (s/h) in the later stage. t he cutoff frequency is fc=60khz. s/h & level shift & scf s/h doubles the lpf output and samples and holds it . t he output reference voltage can be changed. output reference voltage adj. adj. range 0. 02*vdd to 0.98*vd adj. step 0.002*vdd /step scf is a low-pass filter used for internal band lim iting without using the external capacitors. the cutoff frequency (fc: 1khz /500hz /250hz) of th e filter can be set by eeprom. buffer & smf buffer to produce a band-limited output with low im pedance. provides 1.111x output. 146k? internal resistance and an external capacitor (c) make the lpf characteristics. change the external capacitance va lue according to the desired signal band for detection using the following equat ion: fc=1/(2** 146k?*c) (hz) smf is a low- pass filter (fc=10khz) used for eliminating the clo ck noise produced by the scf in the previous stage. smf is switched on or off in combi nation with the previous-stage scf using the eeprom data.
[AK8998/w/d] msxxxxx-e-00 - 8 - 2012/11 block functions timing logic generates timing sync signals for internal operatio n and sampling frequencies for sensor output signals. sampling frequency (fs): 10khz or 1khz regulator constant voltage generator circuit to drive the sen sor. the drive voltage can be selected from the eeprom depending on the supply vo ltage being used. drive voltage: 2.2v @vdd:3, 3.3v5%, 4.0/2.2v @vdd: 5v5% pressure detector1, 2 two sets of pressure detection circuits. the pressure range can be individually selected depending on the eeprom data for the pressure detector. ? pressure above a certain value is detected ? pressure below a certain value is detected the det1 and det2/pth pins go high when the detected pressure exceeds the threshold (the polarity change by eeprom is possible). the detection threshold can be set by the input of det2/pth pin (when only pressure detector 1 is used) or using t he eeprom data in the AK8998. the hysteresis voltage can be adjusted at 2 bits (4 steps ), and it varies ratiometrically with respect to the sup ply voltage as well as the detection threshold. note that the exact pressure determination cannot be achieved until the vout pin output is stabilized at the time of power up or due to the above setup and buffer circuit feedback resistor and external capacitor values.
[AK8998/w/d] msxxxxx-e-00 - 9 - 2012/11 reference section & others block functions v_bandgap (vbg) v_reference (vref) i_reference (iref) generates the reference voltage or bias current req uired for each circuit. adjust the vref voltage so that it is equivalent to 1.0v. vref voltage adj. resolution 3bits adj. step 1% / step iref current should be adjusted to 1.0v voltage acr oss 1m? external resistor ti ed to vout pin. iref current adj. resolution 4bits adj. step 2.8% / step oscillator (osc) oscillator to generate timing sync signals for inte rnal operation and sampling frequencies for sensor output signals. oscillation frequency is adjusted as the counter result reaches the expected value, the inte rnal counter counts for the period of csclk is high (2msec typ.). for the detail, refer to the functional description 1) adjustment procedure description (example) . osc adj. resolution 4bits adj. step 5% / step v_temp. (vtmp) temperature sensor for converting the ambient tempe rature to voltage. adjust the temperature sensor output voltage (vtmp voltage) so that it is equivalent to vref voltage at 25oc. a nd it is also possible to select the external tempe rature sensor by eeprom in consideration of the case where a pressure sensor a nd the AK8998 are separated physically. when the external temperature sensor is chosen, t he constant current of 50a is sinked from the extmp pin to vss. vtmp voltage adj.(internal) resolution 6bits adj. step 0.2% / step vtmp voltage adj.(external) resolution 9bits (rough/fine=3/6bits) adj. step rough 10% /step / fin e 0.2% /step v_common (vcom) generates analog circuit reference voltage 1/2vdd. the internal power- up circuit causes it to start up within the settlin g time for stable analog operation (start up valid time). agnd pin ca n be validated by eeprom (eagnd[0]=1h). it is effective to improve the noise characteristic (see recommended connection examples for components). in the case of eagnd[0]=0h , the agnd pin is hi-z. power on reset(por) power up circuit is for stable analog operation upo n power-up. in order to make the power-on reset effective, be s ure to power up the supply voltage from below 0.1*vdd. serial i/f serial interface for accessing eeprom and control r egister (volatile memory). it accesses using the csclk pin and the vout pin. eeprom & control register eeprom and control register (volatile memory). used to store compensation values and measurement m odes and to set up the measurement modes for adjustment.
[AK8998/w/d] msxxxxx-e-00 - 10 - 2012/11 pin assignments and functions pad name i/o c load max. r load min. type comments 1 vss gnd 2 vo i analog resistive load connection prohibited escf[1:0]: open when 1,2,3h o 50pf 9.5k analog resistance load is connectable with vdd or vss i/o 100pf cmos pull-down resistor (100k?) included when sdi/o mode 3 vout o 300pf analog adjustment mode 4 vdd power 5 agnd o analog eagnd[0]: resistive load connection prohibited when 1h eagnd[0]: open when 0h 6,7,8 n.c. do not connect 9 csclk i cmos pull-down resistor (100k?) included 10 det1 o cmos o cmos 11 det2 /pth i analog epth1[0]=1h 12 n.c. do not connect 13 vn i analog o 30pf 1k analog evd[1:0]=0h 14 vs o 30pf 0.82k analog evd[1:0]=1, 2, 3h 15 vp i analog 16 extmp i analog do not connect when not in use pin descriptions pin conditions pad name functions start up note) eagnd[0] : h / l einv1/2[0] : h / l eine1/2[0] : h 1 vss negative voltage supply pin - - - - 2 vo capacitance connection pin for sensor signal band-limiting hi-z - normal operation - 3 vout sensor signal / data i/o / calibration interface pin hi-z - normal operation - 4 vdd positive supply voltage pin - - - - 5 agnd analog ground with external capacitance for stabilization 0.5*vdd /hi-z 0.5*vdd /hi-z normal operation - 6,7,8 n.c. - - - - 9 csclk chip select / serial clock pin - - - - 10 det1 output pin for pressure detection 1 vdd/vss - vss/vdd vss 11 det2 /pth output pin for pressure detection 2 / pressure detection circuit 1 threshold external input vdd/vss - vss/vdd vss 12 n.c. - - - - 13 vn sensor differential signal input pin (-) - - - - 14 vs constant voltage supply pin for sensor drive hi-z - normal operation - 15 vp sensor differential signal input pin (+) - - - - 16 extmp external tempera ture sensor voltage input pin hi-z - - - note) in the case of eagnd[0]=h/l and einv1/2[0]=h/l
[AK8998/w/d] msxxxxx-e-00 - 11 - 2012/11 level diagram vdd: 5v (estc[0]=1h) vp vn g1 g=10 g2(d2s) g3 g=0.6*3.0 s/h & scf & level shift g=2 lvs=0.02*vdd - 0.98*vdd buffer & smf g=1.111 0.5*vdd vp-vn=80mv +/-400mv 1200mv 2160mv 720mv 0.93*vdd 4320mv 1) level shift : 0.02*vdd, pressure : positive 4800mv 2160mv level shift 0.5*vdd vp-vn=80mv 0.98*vdd 2) level shift : 0.98*vdd, pressure : negative +/-400mv 1200mv 2160mv 720mv 2160mv level shift 4320mv 4800mv 0.5vdd 600mv 3) level shift : 0.5*vdd, pressure : positive & negative 2400mv +/-200mv 360mv 1080mv 1080mv lpf g=1 vo vout g=1.5 ing1=5 - 70 2160mv ing2=1.5, 3.0 vp-vn=40mv 0.02*vdd 0.068*vdd
[AK8998/w/d] msxxxxx-e-00 - 12 - 2012/11 electrical characteristics 1) absolute maximum ratings item symbol min. max. units comments supply voltage vdd -0.3 6.5 v input voltage vdin vss-0.3 vdd+0.3 v input current iin -10 10 ma output current iout -10 10 ma storage temp. tst -55 125 c eeprom retention characteristics 85 c note) operation at or beyond these limits may resul t in permanent damage to the device. 2) recommended operating conditions item symbol min. typ. max. units comments operating temp. ta -20 85 c vdd1 2.85 3.0 3.15 v evd[1:0]=3h vdd2 3.135 3.3 3.465 v evd[1:0]=2h supply voltage vdd3 4.75 5.0 5.25 v evd[1:0]=0h, 1h 3) supply voltage current (see functional description) vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol min. typ. max. units comments supply voltage current 1 idd1 6000 7100 a vdd=5v,vs=4v,fs=10khz note1) supply voltage current 2 idd2 4000 5000 a vdd=3v,vs=2.2v,fs=10khz note1) supply voltage current 3 idd3 1300 2000 a vdd=5v,vs=4v,fs=1khz note1) supply voltage current 4 idd4 1100 1700 a vdd=3v,vs=2.2v,fs=1khz note1) supply voltage current 5 (scf & smf circuit) idd5 100 150 a vdd=5v supply voltage current 6 (pressure detection circuit 1/2) idd6 150 250 a vdd=5v supply voltage current 7 (external temperature sensor drive circuit) idd7 130 200 a vdd=5v note) at the time of measurement, the vs pin connec ts 1k? load, the vout pin is connects no load, and the vp and vn pins supply 0.5*vs. vref and vtmp voltage, iref current and osc freque ncy are complete with adjustment. note1) scf&smfcircuit:off, external temperature sensor drive circuit:off 4) eeprom characteristics vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol min. typ. max. units eeprom endurance etime 1000 times eeprom data retention time ehold 10 years
[AK8998/w/d] msxxxxx-e-00 - 13 - 2012/11 5) digital dc characteristics vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol pin conditions min. typ. max. units high level input voltage vih 1 0.7*vdd - - v low level input voltage vil 1 - - 0.3*vdd v high level input current iih 1 +10 - +200 a low level input current 1 iil1 2 -10 - +10 a low level input current 2 iil2 3 -50 - +50 a high level output voltage voh 4 ioh=-200 a 0.9*vdd - - v low level output voltage vol 4 iol=+200 a - - 0.1*vdd v 1 csclk(integrated 100k? pull-down resistor), vout(integrated 100k? pull-down resistor when sdi/o mode) 2 csclk(integrated 100k? pull-down resistor), 3 vout(integrated 100k? pull-down resistor when sdi /o mode) 4 vout(when sdi/o mode), det1, det2/pth 6) power on/off time and analog circuit settling time for stabl e operation note) vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol min. typ. max. units comments power on/off time tidle 10 msec vdd pin voltage <0.1*vdd settling time for stable analog operation tenable 700 sec agnd output rise time tvgnd 330 sec eagnd[0]=1h, agnd pin external capacitance: 10nf note) design reference value; no production test performed. vdd pin voltage 0.8*vdd tenable 0.1*vdd normal operation tidle agnd pin voltage tvgnd 0.45*vdd 0.5*vdd
[AK8998/w/d] msxxxxx-e-00 - 14 - 2012/11 7) digital ac characteristics vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol min. typ. max. units write time (eeprom address write) twr_eep1 5 100 msec write time (eeprom batch write) twr_eep1 10 100 msec write time (register) twr_reg 10 sec digital mode transition time tinit 1.0 msec analog mode transition time tdigout 0.5 msec data setup time ts 100 nsec data hold time th 100 nsec csclk high time twh 0.5 100 sec csclk low time twl 0.5 100 sec csclkdo delay time note1) td 200 nsec csclk rising time note 2) tr 10 nsec csclk falling time note 2) tf 10 nsec note1) sdo load capacitance=100pf note2) design reference value; no production test performed. [csclk raising/falling timing] tr tf 0.7vdd 0.3vdd csclk [serial i/f timing (write)] csclk tinit ts th twh twl 16 1 d0 twr_eep1/2 i2 vout vout condition hi-z analog output mode 1 i2 analog out twr_reg digital input mode [serial i/f timing (read) ] tdigout csclk td td hi-z a0 d0 d7 16 8 9 vout analog out vout condition analog output mode digital input mode digital output mode
[AK8998/w/d] msxxxxx-e-00 - 15 - 2012/11 8) pressure detector 1 & 2 vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments pressure detection threshold external input range vdete eine1[0]=0h eine2[0]=1h epth1[0]=1h 0.1*vdd 0.9*vdd v pressure detection threshold internal set value vdet ept1, 2[4:0]=00h 0.500 *vdd -0.05 0.500 *vdd 0.500 *vdd +0.05 v vdet+ max: ept1, 2[4:0]=10h 0.900 *vdd v pressure detection threshold internal set value adjust. width vdet- min: ept1, 2[4:0]=0fh 0.125 *vdd v adjust. step vdstp 0.025 *vdd v vhys5+ max: vdd=5v5 % ehys1, 2[1:0]=01h 0.060 *vdd -0.055 0.060 *vdd 0.060 *vdd +0.055 v vhys5- min: vdd=5v5 % ehys1, 2[1:0]=10h 0.030 *vdd -0.03 0.030 *vdd 0.030 *vdd +0.03 v vhys3+ max: vdd=3, 3.3v5 % ehys1, 2[1:0]=01h 0.060 *vdd -0.035 0.060 *vdd 0.060 *vdd +0.035 v hysteresis voltage adjust. width vhys3- min: vdd=3, 3.3v5 % ehys1, 2[1:0]=10h 0.030 *vdd -0.02 0.030 *vdd 0.030 *vdd +0.02 v adjust. step vhysst 0.010 *vdd v pressure detection time tdetr escf[1:0]=0h 150 sec note) pressure non-detection time tdetf escf[1:0]=0h 150 sec note) note) design reference value; no production test performed. tdetr pth 0.5*vdd vout det1, 2 0.5*vdd tdetf vhys
[AK8998/w/d] msxxxxx-e-00 - 16 - 2012/11 9) analog characteristics 9-1) reference section 9-1-1) reference section characteristics vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments vref voltage vr0 unadjusted am[3:0]=1h vout out 0.97 1.0 1.04 v @25 oc vr+ with respect to vr0 max evr[2:0]=3h +30 mv vref adj. width vr- with respect to vr0 min evr[2:0]=4h -40 mv vref adj. step vrstp 10 mv vs4 after vref adj. vs pin out load resistance 1k? 3.88 4.00 4.12 v vs voltage vs2 after vref adj. vs pin out load resistance 0.82k? 2.134 2.20 2.266 v iref current ir0 unadjusted am[3:0]=2h vout out 0.8 1.00 1.2 a @25 oc ir+ with respect to ir0 max eir[3:0]=7h 0.24 a iref adj. width ir- with respect to ir0 min eir[3:0]=8h -0.17 a iref adj. step irstp 0.028 a osc freq. fr0 unadjusted am[3:0]=3h vout out 0.750 1.000 1.250 mhz @25 oc fr+ with respect to fr0 max efr[3:0]=7h 384 khz osc adj. width fr- with respect to fr0 min efr[3:0]=bh -251 khz osc adj. step frstp 50 khz vtmp voltage v 0 unadjusted etmp[0]=1h am[3:0]=4h vout out 0.938 1.0 1.064 v @25 oc vtr+ with respect to vt0 etmp[0]=0h max etm[8:6]=6h +170 mv vtmp adj. width (rough) vtr- with respect to vt0 etmp[0]=0h min etm[8:6]=2h -170 mv rough adj. step vtrstp etmp[0]=0h 85 mv vtf+ with respect to vt0 etmp[0]=1h max etm[5:0]=20h +64 mv vtmp adj. width (fine) vtf- with respect to vt0 etmp[0]=1h min etm[5:0]=1fh -62 mv fine adj. step vtfstp etmp[0]=1h 2.0 mv vtmp temp variation vt etmp[0]=1h 4.6 mv/ c note) note) design reference value; no production test pe rformed.
[AK8998/w/d] msxxxxx-e-00 - 17 - 2012/11 9-1-2) reference section (packaged version only) ch aracteristics vdd=5v5%, ta= 25oc, unless otherwise noted item symbol conditions min. typ. max. units comments vref voltage vr0p 0.99 1.0 1.01 v after adj. vs4p load resistance 1k? 3.88 4.00 4.12 v after adj. vs voltage vs2p load resistance 0.82k? 2.134 2.20 2.266 v after adj. iref current ir0p 0.9 1.0 1.1 a after adj. osc freq. fr0p 0.9 1.0 1.1 mhz after adj. vtmp voltage v 0p etmp[0]=1h 0.988 1.0 1.012 v after adj. note) AK8998 is shipped with adjustment at vdd=5v&v s=4v (evd[1:0]=0h) and internal temperature sensor use (etmp[0]=1h). if vdd=5v&vs=2.2v (evd[1:0]=1h), vdd=3.3v&vs=2.2v(evd[1:0]=2h), vdd=3v&vs=2.2v(evd[1 :0]=3h) and external temperature sensor use (etmp[0]=0h) are the actual ope rating condition, readjustment is required. even if vdd=5v&vs=4v (evd[1:0]=0h) and in ternal temperature sensor use (etmp[0]=1h) are the operating condition, readjustment is r ecommended. 9-2) gain amplifier etc. unless otherwise specified, the following requireme nts apply. ? reference section is complete with adjustment. ? for supply voltage of 5v (3v), sensor drive volta ge of 4v (2.2v), the level diagram includes g1 gain of 10x, g2 gain of 1.5x, g3 gain o f 1.8x, total gain of 60x, level shift 0.02*vdd and the output voltage 4800mv (2400mv) is set as 100% based on a differential input of 80mv (40mv). 9-2-1) overall characteristics vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments std. gain gtyp vp/vnvout 60 times input common voltage vicom 0.45vs 0.5*vs 0.55vs v output common voltage vcom0 vp/vnvout vp=vn=0.5*vs 0.5*vdd v vmax+ 0.98 *vdd v max. output range vmax- vp/vnvout vp-vn=vss or vdd 0.02 *vdd v nout1 vp/vnvout vp=vn=open external feedback capacitance 2.2nf 260 vrms @1hz - 100khz note) noise nout2 vp/vnvout vp=vn=open escf[1:0]=1h 300 vrms @1hz - 100khz note) note) value for total gain of 180x (g1 gain: 30x, g 2 gain: 1.5x, g3 gain: 1.8x, s/h gain: 2x, buffer gain: 1.111x). design reference value; no production test performe d.
[AK8998/w/d] msxxxxx-e-00 - 18 - 2012/11 9-2-2) g1/2 gain adjustment circuit vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode vg1 vp-vn=80mv vdd=5v5 % 1150 1200 1250 mv unadjusted g1/2 output voltage vg2 vp-vn=40mv vdd=3, 3.35 % 550 600 650 mv g1sc+ eig[3:0]=ch 5 times g1 adjustment range g1sc- eig[3:0]=0h 70 times adj. step g1stp 2,3,5,10 times g2sc1+ eig[4]=0h,estc[0]=1h 3 times g2sc1- eig[4]=1h,estc[0]=1h 1.5 times g2sc2+ eig[4]=0h,estc[0]=0h 2.352 times g2 adj. g2sc2- eig[4]=1h,estc[0]=0h 1.176 times 9-2-3) offset voltage adjustment circuit vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode unadjusted output voltage vo01 vdd=3, 3.3, 5v5% 0.5*vdd -0.10 0.5*vdd 0.5*vdd +0.10 v offset rough adj. dac adj. range ocr5+ eocr[3]=0h eocr[2:0]=7h vdd=5v5% +11200 mv ocr5- eocr[3]=1h eocr[2:0]=7h vdd=5v5% -11200 mv ocr3+ eocr[3]=0h eocr[2:0]=7h vdd=3, 3.35% +5600 mv ocr3- eocr[3]=1h eocr[2:0]=7h vdd=3, 3.35% -5600 mv adj. step ocr5stp vdd=5v5% 1600 mv ocr3stp vdd=3, 3.35% 800 mv ocf5+ eocf[7]=0h eocf[6:0]=3fh vdd=5v5% +1016 mv offset fine adj. dac adj. range ocf5- eocf[7]=1h eocf[6:0]=3fh vdd=5v5% -1016 mv ocf3+ eocf[7]=0h eocf[6:0]=3fh vdd=3, 3.35% +508 mv ocf3- eocf[7]=1h eocf[6:0]=3fh vdd=3, 3.35% -508 mv adj. step ocf5stp vdd=5v5% 8 mv ocf3stp vdd=3, 3.35% 4 mv
[AK8998/w/d] msxxxxx-e-00 - 19 - 2012/11 9-2-4) span voltage adjustment circuit vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage adjus tment vs01 vp-vn=80mv vdd=5v5% 2010 2160 2310 mv unadjusted span voltage vs02 vp-vn=40mv vdd=3, 3.35% 1005 1080 1155 mv sc+ esc[7:0]=00h 100/100 times span adj. range sc- esc[7:0]=ffh 100/163.75 times adj. step sc stp n= 0 - +255 100/(100+0.25*n) times 9-2-5) offset temperature drift & sensitivity tempe rature drift adjustment circuit 9-2-5-1) offset temperature drift adjustment circuit note) vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment do5+ eot[8]=0h eot[7:0]=ffh vdd=5v5% +36.8 mv/ c 1 st order coeff. adj. range do5- eot[8]=1h eot [7:0]=ffh vdd=5v5% -36.8 mv/ c do3+ eot[8]=0h eot[7:0]=ffh vdd=3, 3.35% +22.08 mv/ c do3- eot[8]=1h eot[7:0]=ffh vdd=3, 3.35% -22.08 mv/ c adj. step do5 stp vdd=5v5% 0.144 mv/ c do3 stp vdd=3, 3.35% 0.087 mv/ c note) design reference value; no production test performed. 9-2-5-2) sensitivity temperature drift adjustment circuit note) vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment ds1+ estc[0]=1h,est[8]=0h est[7:0]=8bh +2500 ppm/ c ds1- estc[0]=1h,est[8]=1h est[7:0]=deh -4000 ppm/ c ds2+ estc[0]=0h,est[8]=0h est[7:0]=38h +1000 ppm/ c 1 st order coeff. adj. range ds2- estc[0]=0h,est[8]=1h est[7:0]=8bh -2500 ppm/ c adj. step ds stp 18 ppm/ c note) design reference value; no production test performed.
[AK8998/w/d] msxxxxx-e-00 - 20 - 2012/11 9-2-6) supply voltage & temperature sensitivity var iation adjustment circuit (stv) note) vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment sv1 sv circuit initial operation, estc[0]=1h 5.0 % s ensitivity variation characteristics 1 to supply voltage sv2 sv circuit 2 nd operation, estc[0]=1h 0.4 % based on sv1 st1 st circuit initial operation, estc[0]=1h 5.0 % sensitivity variation characteristics 1 to operating temp. st2 st circuit 2 nd operation, estc[0]=1h 0.4 % based on st1 sv3 sv circuit initial operation, estc[0]=0h 5.0 % s ensitivity variation characteristics 2 to supply voltage sv4 sv circuit 2 nd operation, estc[0]=0h 0.2 % based on sv3 st3 st circuit initial operation, estc[0]=0h 5.0 % sensitivity variation characteristics 2 to operating temp. st4 st circuit 2 nd operation, estc[0]=0h 0.2 % based on st3 9-2-7) lpf, s/h & buffer vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment lpf freq. response fc1 40 60 80 khz s/h&buffer gain shg 1.935 2.222 2.523 times s/h&buffer out pre-adj. error sherr -65 65 mv buf gain adj. width bufg 1.000 1.111 1.222 times vbuf+ 0.98 *vdd v vout output voltage range vbuf- load resistance 9.5k? (with vdd or vss) 0.02 *vdd v buf feedback resistor value rbuf 102 146 190 k?
[AK8998/w/d] msxxxxx-e-00 - 21 - 2012/11 9-2-8) level shift vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment vlv+ max elv[8]=1h elv[7:0]=ffh 1.00 *vdd v note) output reference voltage adj. width (level shift) vlv- min elv[8]=0h elv[7:0]=ffh 0.00 *vdd v note) adj. step vlstp 0.002 *vdd v note it is limited to 0.98*vdd from 0.02*vdd by the vout output range. 9-2-9) scf & smf vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments measurement in test mode after offset voltage and s pan voltage adjustment fc1 escf[1:0]=1h 10hz referenced -3db 0.8 1.0 1.2 khz fc2 escf[1:0]=2h 10hz referenced -3db 400 500 600 hz scf&smf freq. response fc3 escf[1:0]=3h 10hz referenced -3db 200 250 300 hz scf&smf gain scfg1 escf[1:0]=1h 1.000 1.111 1.222 times 9-2-10) external temperature sensor drive circuit vdd=3, 3.3, 5v5%, ta=-20 to 85oc, register default, unless otherwise noted item symbol conditions min. typ. max. units comments temperature sensor driving current iconst after iref adj. 40 50 60 a extpv4 vs=4v after vref adj. 3220 3400 3580 mv input voltage range extpv2 vs=2.2v after vref adj. 1474 1600 1726 mv
[AK8998/w/d] msxxxxx-e-00 - 22 - 2012/11 operation sequence 00 initial operation for stv (first time) no. status stv 10 30 4 start up stv0 msr p. supply & sens. variation adj. s/h1&2 vout st0 1/2*vdd for output ref. voltage vout ? (1) det1/2 approx. 500sec 8 18 (first) initial operation vdd 50 pressure measurement period 13 st3 51 normal operation for stv (2nd time & later) clk (1=500khz) no. status 11 31 4 stv1 msr stv p. supply & sens. variation adj. (2nd time & after) normal operation s/h1&2 vout st1 vout ? (n-1) vout ? (n) det1/2 8 18 50 vdd detection: h ((n-1)th judge) st3 13 51 pressure measurement period idling period 1khz:450 10khz: 0 idling period 1khz :450 10khz: 0 0 0 st2 21 4 13 st3 detection h set detection l set detection h set detection l set detection: ((n-1)th judge)
[AK8998/w/d] msxxxxx-e-00 - 22 - 2012/11 description of operation timing status (pressure detection circuit effective) no. state clk operations 00 start up it is the time until analog circuits operate stabl y. analog reference circuits as vref, iref, etc. start up and adjusted output reference voltage is output fro m the vout pin. 10 st0 clock count start analog circuits startup 30 stv0 clk=8 stv initial operation 4 msr clk=18 the result of pressure correction is o utput from vout pin. 13 st3 clk=51 idling with fs=10khz, no idling and in continuous operatio n. idling period 1khz 450 clk 10khz 0 clk 11 st1 clk1=51 pressure detection circuit 1 operation and analog circuit startup 21 st2 clk=4+clk1 pressure detection circuit 2 operati on 31 stv1 clk=8+clk1 stv normal operation pressure detection det1/2 output (the (n-1)th press ure determination)
[AK8998/w/d] msxxxxx-e-00 - 23 - 2012/11 adjustment sequence pressure detector 1 setting routine power off ex. pressure:0kpa ex. ta:25 c pressure detector 2 setting routine control register access set (add 1dh d[7] set) eeprom write enable set (add 1fh d[0] set) power on vtmp adjustment (cadd 00h d[4:1] set add 13h d[1] & 11h d[7:0] set) offset adjustment (add 00h d[3:0] & 01h d[7:0] set) span adjustment (add 02h d[7:0] set) ex. pressure:100kpa ex. ta:85 c level shift set (add 0ah d[0] & 0bh d[7:0] set) offset temperature adjustment (add 03h d[0] & 04h d[7:0] set) ex. pressure:0kpa measurement mode routine vref adjustment (cadd 00h d[4:1] set eeprom initialize (add 1fh d[7:0] set) iref adjustment (cadd 00h d[4:1] set osc adjustment (cadd 00h d[4:1] set add 10h d[3:0] set) note1) eeprom address is indicated by add, control register address is indicated by cadd . ex. pressure:100kpa span temperature adjustment (add 05h d[0] & 06h d[7:0] set) ex. ta:25 c ex. pressure:0kpa eeprom write enable set (add 1eh d[0] set) control register access set (add 1dh d[0] set) note2) please refer the digital part flow chart for eeprom / control register writing and reading. gain(g1/g2/g3) set add 0ch d[4:0]=1c hex add 02h d[7:0]=ff hex gain(g1/g2) set (add 0ch d[4:0] set) ex. pressure:100kpa offset readjustment (add 00h d[3:0] & 01h d[7:0] set) ex. pressure:0kpa ex. pressure:0kpa offset fine adjustment (add 01h d[7:0] set) ex. pressure:100kpa span fine adjustment (add 02h d[7:0] set) s/h circuit output error adjustment routine
[AK8998/w/d] msxxxxx-e-00 - 24 - 2012/11 supply voltage & drive voltage set (add 0dh d[2:1] set) measurement mode routine scf on / off & scf fc set (add 0dh d[4:3] set) sampling freq. set (add 0dh d[0] set) vtmp internal/external set (add 0dh d[5] set) vp / vn set (add 0dh d[6] set) pressure detector set (add 0dh d[7] set) (add 07h/08h d[6] set) end span temperature set (add 13h d[0] set) register set add 19h d 0ah set add 10h d 34h set add 12h d 40h set add 17h d 08h set s/h circuit output error adjustment routine csclk=h vout voltage measurement y csclk=l 0.5ms< level shift set (add 0ah d[0] & 0bh d[7:0] set) end csclk=h vout voltage 0.5*vdd ? n * it is necessary to set up a register in order of the following. register set add 19h d 0ah set add 10h d 34h set add 12h d 40h set add 17h d 08h set * it is necessary to set up a register in order of the followin g.
[AK8998/w/d] msxxxxx-e-00 - 25 - 2012/11 function on/off check (add 07h d[6] pressure detector 1 setting routine end d[6] : 1 d[6] : 0 pressure detector threshold set (add 07h d[4:0] function on/off check (add 08h d[6] pressure detector 2 setting routine end d[6] : 1 d[6] : 0 pressure det ector hyster esis set (add 09h d[1:0] set) pressure detector hysteresis check (cadd 00h d[4:1] set) pressure detector hysteresis set (add 09h d[3:2] set) pressure detector hyster esis check (cadd 00h d[4:1] set) pressure detector threshold set (add 08h d[4:0] pressure det ector threshold check (cadd 00h d[4:1] set) pressure detector threshold check (cadd 00h d[4:1] set) output polarity set (add 07 d[7] set) threshold function set (add 07h d[5] set) output polarity set (add 08 d[7] set) threshold function set (add 08h d[5] set)
[AK8998/w/d] msxxxxx-e-00 - 26 - 2012/11 functional description 1) adjustment procedure description (example) the adjustment procedure for the AK8998 follows (see "adjustment sequence."). note) when shipped in package form, the adjustments for the items 1-4 below have been completed. it is necessary to read the data (items 1-4 below) from a chip first and after initializing the eeprom, rewrite the readout data. note that depending on the required accuracy and implementation form, there could be some cases where items 1-4 should be readjusted. AK8998 is shipped with adjustment at vdd=5v & vs=4v mode (evd[1:0]=0h) and inter nal temperature sensor use (etmp[0]=1h). if other modes (evd[1:0]=1, 2, 3h, etmp [0]=0h) are the actual operating condition, readjustment is required. even if vdd=5v&vs=4v (evd[1:0]=0h) and internal temperature sensor use (etmp[0]=1h) are t he operating condition, readjustment is recommended. keep the sequence as adjustment of vref adjustment, iref adjustment, osc adjustment , and vtmp adjustment in turn. if vref adjustment and iref adjustment are performed after osc adjustment, adjusted oscillating frequency will shift. the eeprom address is referred to as "address," while the control register (vol atile memory) address is referred to as "c address." 1. vref adjustment (completed when shipped in package form) the reference voltage is adjusted to 1.0v by vref voltage adjustment eeprom (addres s: 0eh, data evr[2:0]). adjusting the vref voltage also means adjustment of the sensor driv e voltage (vs). vref voltage is observed at vout pin (see recommended connection examples for components) while the csclk pin high (csclk high time) after the writing of an adjustment mode register (c address: 00h, data am[3:0]= 1h). 2. iref adjustment (completed when shipped in package form) the reference current is adjusted to 1.0a. the external resistor (1m ) is connected to vout pin. reference current is supplied to the external resistor, and iref current adjustment eeprom (address: 0fh, data eir [3:0]) is adjusted so that the voltage across the both ends of the external resistor is set to 1.0v. a nd it can adjust more accurate by taking into consideration the input impedance (input resistance) of adjus tment apparatus. with 1m external resistor to the vout pin, it is adjusted in voltage domain. the external 1m should be connected only at the time of iref adjustment. when with resistance 1m is connected always in outside, please be careful of the input impedance of adjustment apparatus. the input impedance of adjustment apparatus should become more than 10g . iref current is observed at vout pin (see recommended connection examples for components) while the csclk pin high (csclk high time) after the writing of an adjustment mode register (c address: 00h, data am[3:0]= 2h). vout csclk 1 4 16 9 twr_reg hi-z vref monitor csclk high time i2 1 analog output vout csclk 1 4 16 9 twr_reg hi-z iref monitor csclk high time i2 1 analog output
[AK8998/w/d] msxxxxx-e-00 - 27 - 2012/11 3. osc adjustment (completed when shipped in package form) the intermittent operation control clock is adjusted to 1,000khz. oscillation frequency can be adjusted without monitoring frequency directly. the high level for the fixed period (2.0msec1%) is inputted from the csclk pi n after the writing of an adjustment mode register (c address: 00h, data am[3:0]= 3h). the internal clock pul ses are counted in the integrated counter circuit, and the count value is stored in the control regi ster (c address: 01h, data ct[7:0]). the adjustment data (address: 10h, data efr[3:0]) for osc illation frequency is calculated from the stored count value. the adjustment can be done within 1000khz5% accuracy by writing the adjustment data in eeprom. since the error of high period turns into an adjustment error of frequency, please set period as 2.0ms1%. the explanation of oscillation frequency adjustment da ta (address: 10h, data efr[3:0]) is as follows. the count value stored in the control register (c addr ess: 01h, data ct[7:0]) is read for the ratio check. a ratio will be 0% (ideal value), when the high level period of csclk pin is 2 msec and the frequency of the internal oscillator i s 1000 khz. the ratio varies from 0% by the error of high level period and the frequency variat ion of the internal oscillator. and the high time which can be set up becomes a range from which a ratio will be -99% to 154%. be aware that the error is easily affected when the ra tio is small. in addition, the counter value shown as ff hex means overflow, please measure agai n by changing high level period. please set the adjustment data of oscillation frequenc y as the sum of the ratio of ct [7:0] data and the ratio of efr [3:0] data is close to 0% . address : 01 hex d[7:0]=ct[7:0] ct[7:0] count value ratio comments dec hex bin (time) (%) 0 00 00000000 0 0 default 1 01 00000001 1 -99 98 62 01100010 98 -2 99 63 01100011 99 -1 100 64 01100100 100 0 ideal value 101 65 01100101 101 1 102 66 01100110 102 2 254 fe 11111110 254 154 255 ff 11111111 - - counter error csclk 1 4 16 9 twr_reg i2 1 tcont= 2.0ms 1% pulse count. analog output vout
[AK8998/w/d] msxxxxx-e-00 - 28 - 2012/11 address : 10 hex d[3:0]=efr[3:0] efr[3:0] ratio frequency ?f dec hex bin ( % ) (khz) comments -5 b 1011 -34 -251 -4 c 1100 -25 -197 -3 d 1101 -17 -146 -2 e 1110 -11 -99 -1 f 1111 -5 -52 0 0 0000 0 0 default 1 1 0001 5 49 2 2 0010 10 106 3 3 0011 14 162 4 4 0100 18 224 5 5 0101 22 274 6 6 0110 25 329 7 7 0111 28 384 note1) hex 8 to a are prohibited for setup. when high level period is not 2 msec, the ideal value of ct [ 7:0] can be calculated as follows. considering the calculated ideal value as 100%, and a ratio should be redefined. please set the adjustment data of oscillation frequency as the su m of the ratio of ct [7:0] data and the ratio of efr [3:0] data is close to 0%. count value[time]=high time[msec] / 2 * 100 ex.) in the case of 3 msec, 100 time 150 time. 4. vtmp adjustment (completed when shipped in package form) temperature sensor output (vtmp) voltage is adjusted to match the vref voltage. when the external temperature sensor is used, connect the external temperature sensor to the extmp pin, and set up a measurement mode eeprom (address: 0dh, data etmp[0]= 0h). vtmp voltage is observed at vout pin while the csclk pin high (csclk high time) after the writing of an adjustment mode register (c address: 00h, data am[3:0]= 4h). *in sampling frequency 1khz mode (esf[0] =1h), the external temperature sensor (et mp[0] =0h) cannot be used. 5. s/h circuit output error adjustment the s/h circuit output voltage is adjusted to become 0.0v at vout pin by using the output reference voltage adjustment eeprom (address:0ah data:elv[8], address:0bh data:elv[7:0]). vout csclk 1 4 16 9 twr_reg hi-z vtmp monitor csclk high time i2 1 analog output
[AK8998/w/d] msxxxxx-e-00 - 29 - 2012/11 6. offset voltage adjustment the offset voltage for the pressure sensor is adjusted including the AK8998 internal error by using the offset voltage adjustment eeprom (address:00, 01h data:eocr[3:0], eocf[7:0]) . offset voltage adjustment example (@vdd:5v) eocr[3]: offset voltage rough adjustment sign bit if unadjusted output is more than 0.5*vdd, set eocr [3]=1h. if unadjusted output is less than 0.5*vdd, set eocr [3]=0h. eocr[2:0]: offset voltage rough adjustment: adjust in 1600-mv steps. eocf[7]: offset voltage fine adjustment sign bit if unadjusted output is more than 0.5*vdd, set eocf [7]=1h. if unadjusted output is less than 0.5*vdd, set eocf [7]=0h. eocf[6:0]: offset voltage fine adjustment: adjust i n 8-mv steps. when the offset voltage is +360mv (0.5*vdd referenc e), set eocf[7]=1h and eocf[6:0]=45dec. 360[mv]-(8[mv]*45[dec])=0.0[mv] 7. input gain (g1/g2) setup set up g1/g2 gain so that gain amp.1/2 output volta ges become the ranges (in the case of vdd=5v, g1 1700mv, g2 1950mv). the voltage and temperature coefficient w hich are used for calculation is as follows. the offset voltage and the span voltage in 25 c are calculated by dividing the measurement result (vout pin) of the 1st offset voltage and the span voltage by 18.35 (total gain). and for the offset voltage temperature drift coefficient and the sensitivity temperature drift coeffi cient, the min value (minus polarity) of the pressure sensor assumed is used. in addition, since offset voltage and the offset voltage temperature drift coefficient are adjusted with gain amp.1 output, g2 gain is calculated noting that only the span voltage and the sensi tivity temperature drift coefficient. voff25: offset voltage of the pressure sensor@25 c vsp25: span voltage of the pressure sensor @25 c ktoff: offset voltage temperature drift coefficient of the pressure sensor (mi n value) ktsp: sensitivity temperature drift coefficient of the pressure sensor (mi n value) in the case of vdd=5v and temperature=-20 to 85 c gain amp.1 output =g1*(voff25+vsp25+ktoff*(-20[ c]-25[ c])+vsp25*ktsp*(-20[ c]-25[ c])) 1700mv gain amp.2 output =g1*g2*(vsp25+vsp25*ktsp*(-20[ c]-25[ c])) 2100mv in the case of vdd=3.3v/3.0v and temperature=-20 to 85 c gain amp.1 output =g1*(voff25+vsp25+ktoff*(-20[ c]-25[ c])+vsp25*ktsp*(-20[ c]-25[ c])) 800mv/800mv gain amp.2 output =g1*g2*(vsp25+vsp25*ktsp*(-20[ c]-25[ c])) 1250mv/1150mv 8. offset voltage readjustment the offset voltage is readjusted. the offset voltage adjustment eeprom is once reset to all"0", and the adjustm ent should be done again using the offset voltage adjustment eeprom.
[AK8998/w/d] msxxxxx-e-00 - 30 - 2012/11 9. output reference voltage adjustment adjust the output reference voltage. the output reference voltage is adjusted by using the output reference voltage adjustment eeprom (address: 0a, 0bh data: elv[8:0]). output reference voltage adjustment example (@vdd: 5v) when the output reference voltage is 100mv, set elv [8]=0h and elv[7:0]=240dec. 2500[mv]+(-0.002*vdd*240[dec])*5000[mv]=100[mv] 10. output span voltage adjustment the output span voltage for the connected pressure sensor is adjusted, including the AK8998 internal error, by using the output span voltage adjustment register (address: 02h data: esc [7:0]). output span voltage adjustment example (@vdd:5v) when the output is 3700mv, set esc[7:0]=140dec (tar get span voltage 4800mv). (3700[mv]-100[mv])*1.8*100/(100+0.25*(140))=4800[mv] 11. offset temperature drift adjustment the offset temperature drift for the pressure sensor is adjusted, including the AK8998 internal error, by using the offset voltage temperature drift adjustment register (address: 03 , 04h data: eot[8:0]). offset temperature drift adjustment example (@vdd: 5v) eot[8]: offset voltage adjustment sign bit if unadjusted output is greater than the output ref erence voltage, set eot[8]=1h. if unadjusted output is smaller than the output ref erence voltage, set eot[8]=0h. eot[7:0]: offset voltage adjustment: adjust in 0.144mv/oc steps (@vdd: 5v). if the offset voltage is +300mv (with respect to the output reference voltage e.g.100mv) at ta=85 c, set eot[8]=1h, eot[7:0]=35dec. (100[mv]+300[mv])-(85[ c]-25[ c])*(0.144[mv/ c]*35[dec])=97.6[mv] 12. sensitivity temperature drift adjustment the sensitivity temperature drift for the pressure sensor is adjusted, including t he AK8998 internal error, by using the sensitivity temperature drift adjustment register (address: 05, 06h data: est[8:0]). sensitivity temperature drift adjustment example ( @vdd:5v, estc[0]=1hex) est[8]: sensitivity temperature drift adjustment si gn bit (target span voltage 4800mv) if unadjusted output is greater than 4800mv (with respect to the output reference voltage) at ta=85 c, set est[8]=1h. if unadjusted output is smaller than 4800mv (with respect to the output reference voltage) at ta=85 c, set est[8]=0h. est[7:0]: sensitivity temperature drift adjustment: a djust in 18ppm/ c steps (@vdd: 5v). if the output voltage is +4,400mv (with respect to the output reference voltage e.g.100mv) at ta=85 c, set est[8]=0h, est[7:0]=77dec. 4400[mv])+(85[ c]-25[ c])*(18[ppm/ c]*77[dec])*4800[mv]=4799.2[mv] 13. offset voltage fine adjustment the offset voltage error is caused by compensating the offset voltage temperature drift. the offset voltage is adjusted using the offset voltage fine adjustment eeprom (address: 01h data : eocf[7:0]).
[AK8998/w/d] msxxxxx-e-00 - 31 - 2012/11 14. output span voltage fine adjustment the output span voltage error is caused by compensating the offset voltage temperature drift . the output span voltage is adjusted using the output span voltage adjustment register (address: 02h data: esc[7:0]). 2) finding the vout and vo pins external capacitance (cap) this section explains how the vout and vo pins external capacitance is defined. the requirements for determining the vout and vo pins external capacitance values are t he stabilization time on power-up and s/(n+d)=signal/(noise+distortion). 1. vout pin output voltage stabilization time note that depending on the vout and vo pins external capacitance values, the measurement values (vout pin voltage) may contain errors upon power-up. "99% settling time ( + in the figure)" in the table below represents the analog stabilization time in the figure and the time required to settle down to 99% of the output voltage (0.1*vdd i n this case) according to the pressure applied during the period ( + in the figure). the period in the figure is 0.30msec (typ). subsequently, the output voltage will settle to 99% according to the pressure during period in the figure. when the vo pin capacitance is 1f, the period in the figure will settle within 672.4msec. settling time (period in the figure) =-146[k?]*1[f]*ln(1-99/100)=672.4 [msec] therefore, the settling time up to 99% (period + in the figure) will be as follows: 99% settling time (period + in the figure) = 0.30[msec] + 672.4[msec] = 672.7 [msec] referring to the previous calculation example, determine the stabilization time based on t rue terms of use: prerequisites: vo pin external capacitance: cap cap[f] typ., cap*1.1[f] worst vo pin internal resistance: res 146[k?] typ., 190[k?] worst period in the figure: time 0.30[msec] typ., 0.40[msec] worst settling time (period in the figure) = -res*cap*in(1-99/100) 99% settling time (period + in the figure) = time + settling time vdd pin voltage sample timing e.g. when sampling frequency is 10khz and vout/vo pin capacitance is 1f. vo&vout pin voltage - reference designators : sampling timing; this diagram represents 10khz (0 .1msec). : power-up rise time (vdd). : settling time for stable analog operation. : pressure signal detection time. this time depends on the vo pin external capacitance and the interna l 146k? resistance. hi-z
[AK8998/w/d] msxxxxx-e-00 - 32 - 2012/11 fig time (msec) 99% settling time (ms) ( ) 99% settling time (ms) ( + ) vo pin ext. cap (nf) cutoff freq.(hz) (typical) typical case worst case note) typical case worst case note) typical case worst case note) 1000 1.090 0.300 0.400 672.4 962.5 672.7 962.9 220 4.955 0.300 0.400 147.9 211.7 148.2 212.1 22 49.55 0.300 0.400 14.79 21.17 15.09 21.57 2.2 495.5 0.300 0.400 1.479 2.117 1.779 2.517 0.22 4.96k 0.300 0.400 0.148 0.212 0.448 0.612 0.1 10.9k 0.300 0.400 0.067 0.096 0.367 0.496 note) worst case for external capacitance 10% and lot variations. 2. vout pin s/(n+d) summarized in this table is the relationship between the vo pins external capacitance and s/(n+d). note that the s/(n+d) should be 40db or larger if 1.0% fs adjustment accuracy is required. s/(n+d) characteristics sampling freq.(hz) vo pin ext. cap (nf) cutoff freq.(hz) (typical) typical case worst case note) 1000 1.090 68.8 64.6 220 4.955 55.6 51.4 22 49.55 35.6 31.4 1 2.2 495.5 15.8 11.8 220 4.955 75.6 71.4 22 49.55 55.6 51.4 2.2 495.5 35.6 31.4 10 0.22 4.96k 15.8 11.8 note) worst case for external capacitance 10% and lot variations. as mentioned in sections "1. vout pin output voltage stabilization time" and "2. vout pin s/(n+d)", the vo pin external capacitance value should be reduced to decrease the measurement time. for increased s/(n+d), the vo pin external capacitance value should be greater. on determining the vo pin external capacitance value, the various conditions should be thoroughly reviewed according to the application requirements. 3) pressure detection operation at power-up use caution when operating the pressure detection circuits. vout pin output voltage is settled down based on the time constant determined by the internal resistance 146k? and vo pin external capacitance cap value (see 2) finding the vo pin ex ternal capacitance (cap) ). note that errors may be detected during the time in which vout pin output is not settled down to the voltage required according to the pressure applied.
[AK8998/w/d] msxxxxx-e-00 - 33 - 2012/11 4) power consumption current values described in 3) supply voltage current in the electrical characteris tics are those for the average current. the maximum current is shown in the table below. use a power supply wi th sufficient supply capacity by referring to this table: units vdd:3.6v vdd:5.5v comments max. current ma 5.5 7.5 reference value for design 5) pressure detectors 1 and 2 5-1) pressure detector's detection threshold the internal setup and external setup for the pressure detectors' (1 and 2) detection thres hold is described. block diagram of the pressure detectors 1 and 2: the detection threshold of the pressure detectors 1 and 2 can be set up, as shown in the block diagram. for the pressure detectors 1 either through the exte rnal input (det/pth pin) or internal setup (eeprom setup ept1[4:0]) is used, fo r the pressure detector 2 only the internal setup (eeprom setup ept2[4:0]) is used. 5-2) pressure detector's hysteresis voltage the hysteresis voltage in the pressure detectors' (1 and 2) detection threshold is descr ibed. the hysteresis voltage to the detection threshold of the pressure detectors 1 and 2 is as follows by the detection threshold setup (detect pressure above or below threshold). detect pressure above threshold: detection threshold C hysteresis voltage detect pressure below threshold: detection threshold + hysteresis voltage in addition, the setting range of detection threshold hysteresis voltage should be s et between from 0.125*vdd to 0.9*vdd (same setting range as the detection threshold of the press ure detector). det1 logic vout ein1l[1:0] ein2l[1:0] det2/ pth threshold eeprom ept2[3:0] threshold eeprom ept1[3:0] epth1[0] epth1[0] det1/2 control
[AK8998/w/d] msxxxxx-e-00 - 34 - 2012/11 6) vout output the AK8998 vout output shows four kinds of output waveforms below according to the condition. please use the AK8998 understanding of those output waveforms may come. no item content description sensitivity temperature variation characteristic (st operation) : when temperature changes, vout output shows sawtooth waveform within st adjustment step, according to the pressure applied. 1 output waveform description sensitivity supply voltage variation characteristic (sv operation) : when supply voltage changes, vout output shows stepwise waveform within sv adjustment step , according to the pressure applied. 2 output waveform supply voltage(v) vout(v) sv adjustment step 4.5 5.5 target voltage vout(v) temp( ) st adjustment step -20 85 target voltage
[AK8998/w/d] msxxxxx-e-00 - 35 - 2012/11 no item content description vout output time change 1 : when the band is not limited, a vout output shows stepwise change for every sampling period in the following figures. since its change occurs for every sampling period, it can be reduced by using bandwidth shaping filter. 3 output waveform description vout output time change 2 : when temperature changes slowly to compare with the band-limited time, a vout output shows stepwise change with temperature change in the following figures. for example, it occurs when the temperature in a thermostat chamber changes slowly. 4 output waveform time(msec) vout(v) st or sv 1 step 1 cycle fs) vout(v) time(min) st 1 step temp temperature change
[AK8998/w/d] msxxxxx-e-00 - 36 - 2012/11 serial interface description the data of eeprom and control register (volatile memory) in the ak8999 can be wri tten and read through a two-wire serial interface, consisting of csclk pin and vout pin. when csclk=high is maintained beyond a definite period of time (1.0 msec), vout output will change from the analog output to sdi/o (serial data i/o). and data is captured from vout synchronously with the rising edge of csclk after sdi/o shift. input data contains three instruction bits (i2 - i0), five address bits (a4 - a0) and eight data bits (d7 - d0). provide the data in the order of i2 i0 a4 a0 d7 d0. and when csclk=low is mai ntained beyond a definite period of time (0.5 msec), vout output will return from sdi/o t o the analog output. on the write instruction, allow 5msec or more write time for eeprom and 10 sec or more write time for the control register (see twr in 6) digital ac characteristics in the elec trical characteristics section). for the read instruction, data is written up to 8clk for csclk and the data output star ting at the rising edge of 9clk is read out. 1) data configuration configuration of data written to or read out through the serial interface is shown below. there are 16 specific bits of data in total comprised of three instruction bits, five addres s bits and eight data bits. instruction address data i2 i1 i0 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 data input direction 2) description of instructions instruction codes are summarized below. code note 1) i2 i1 i0 instruction description 1 1 0 eeprom read (read mode) reads out the data written in the eeprom eeprom write (write mode) writes data to the eeprom. write time (from 16 th csclk rising edge to csclk falling edge) requires 5msec or more. 1 0 1 eeprom batch write (write mode) if the 1fh address is written, input data is written to all addresses except for 1eh. write time (from 16 th csclk rising edge to csclk falling edge) requires 10msec or more. 0 1 0 control reg. read (read mode) reads out the data written in the control register. 0 0 1 control reg. write (write mode) writes the data to the control register. write time (from 16 th csclk rising edge to csclk falling edge) requires 10sec or more. note) instructions other than this are prohibited.
[AK8998/w/d] msxxxxx-e-00 - 37 - 201 2/11 3) flow chart of digital block the flow chart of digital block is shown below. normal mode vout : analog output csclk=high > 1.0 ms no digital i/o mode vout : data i/o yes eeprom write instruction code : 101 eeprom read instruction code : 110 register write instruction code : 001 timing chart1 vref adjustment set vtmp adjustment set osc adjustment set csclk=high (write time) > 5ms csclk=low > 0.5 ms yes no between csclk="high" vout : vref between csclk="high" osc clock counting between csclk="high" vout : vtmp timing chart2 timing chart3 register read instruction code : 010 pressure detector 1/2 hysteresis level adjustment set pressure detector 1/2 threshold a d justment set iref adjustment set between csclk="high" vout : iref note1) in data i/o mode, when the condition of csclk=low > 0.5 ms consists, it becomes an analog output mode. the flow chart of digital block power on note2) the state of eeprom write enable and control register access enable is required. s/h err adjustment set between csclk="high" vout : s/h out between csclk="high" vout : pressure hysteresis level between csclk="high" vout : pressure level csclk=low > 0.5 ms yes no
[AK8998/w/d] msxxxxx-e-00 - 36 - 2011/12 4) serial interface timing diagram 4.1) timing chart 1 4.2) timing chart 2 4.3) timing chart 3 [eeprom write mode] a4 a3 a2 a1 a0 d7 d0 vout csclk 1 4 16 9 twr_eep a4 a3 a2 a1 a0 csclk 1 16 9 [eeprom read mode] d7 d0 hi-z hi-z i2 i1 i0 i2 i1 i0 vout i2 1 analog output 1 4 a4 a3 i2 i1 i0 a2 analog output a4 a3 a2 a1 a0 csclk 1 16 9 [register read mode] d7 d0 hi-z hi-z i2 i1 i0 vout 1 4 a4 a3 i2 i1 i0 a2 digital i/o [register write mode1] vref / iref / vtmp / pressure level /pressure hysteresis level / s/h er ror adjustment set a4 a3 a2 a1 a0 d7 d0 vout csclk 1 4 16 9 twr_reg i2 i1 i0 hi-z (note) vref / iref / vtmp / pressure level / s/h error pressure hysteresis level voltage monitor ( note) csclk high time analog output i2 1 [register write mode2] osc adjustment set a4 a3 a2 a1 a0 d7 d0 vout csclk 1 4 16 9 twr_reg i2 i1 i0 tcount i2 1 analog output
[AK8998/w/d] msxxxxx-e-00 - 37 - 2011/12 5) register map 5.1) eeprom map plan data note 1) name content address (hex) d7 d6 d5 d4 d3 d2 d1 d0 eocr[3] eocr[2] eocr[1] eocr[0] ocr offset voltage rough adj. 00h 0 0 0 0 eocf[7] eocf[6] eocf[5] eocf[4] eocf[3] eocf[2] eccf[1] eocf[0] ocf offset voltage fine adj. 01h 0 0 0 0 0 0 0 0 esc[7] esc[6] esc[5] esc[4] esc[3] esc[2] esc[1] esc[0] sc output span voltage adj. 02h 0 0 0 0 0 0 0 0 eot[8] ots offset voltage temp. drift adj. 03h 0 eot[7] eot[6] eot[5] eot[4] eot[3] eot[2] eot[1] eot[0] ot offset voltage temp. drift adj. 04h 0 0 0 0 0 0 0 0 est[8] sts sens. temp. drift adj. 05h 0 est[7] est[6] est[5] est[4] est[3] est[2] est[1] est[0] st sens. temp. drift adj. 06h 0 0 0 0 0 0 0 0 einv1[0] eine1[0] ein1l[0] ept1[4] ept1[3] ept1[2] ept1[1] ept1[0] pth1 pressure detector 1 07h 0 0 0 0 0 0 0 0 einv2[0] eine2[0] ein2l[0] ept2[4] ept2[3] ept2[2] ept2[1] ept2[0] pth2 pressure detector 2 08h 0 0 0 0 0 0 0 0 epth1[0] ehys2[1] ehys2[0] ehys1[1] ehys1[0] hys1 hys2 pressure detector comparator hysteresis voltage adj. 09h 0 0 0 0 0 elv[8] lvs output ref. voltage adj. 0ah 0 elv[7] elv[6] elv[5] elv[4] elv[3] elv[2] elv[1] elv[0] lv output ref. voltage adj. 0bh 0 0 0 0 0 0 0 0 eig[4] eig[3] eig[2] eig[1] eig[0] ing input gain adj. 0ch 0 0 0 0 0 eagnd[0] evpn[0] etmp[0] escf[1] escf[0] evd[1] evd[0] esf[0] mm1 meas. mode 0dh 0 0 0 0 0 0 0 0 evr[2] evr[1] evr[0] vref * vref voltage adj. 0eh 0 0 0 eir[3] eir[2] eir[1] eir[0] iref * iref current adj. 0fh 0 0 0 0 efr[3] efr[2] efr[1] efr[0] osc * osc frequency adj. 10h 0 0 0 0 etm[7] etm[6] etm[5] etm[4] etm[3] etm[2] etm[1] etm[0] vtmp * vtmp adjustment 11h 0 0 0 0 0 0 0 0 eue[7] eue[6] eue[5] eue[4] eue[3] eue[2] eue[1] eue[0] ue user-writable data 12h 0 0 0 0 0 0 0 0 etm[8] estc[0] stc sensitivity temperature drift adjustment range and vtmp adj. 13h 0 0 reserved 14h C 1ch etst[0] mm2 control register access setup 1dh 0 ewe[0] ewe eeprom write enable 1eh 0 eaw[7] eaw[6] eaw[5] eaw [4] eaw[3] eaw[2] eaw[1] eaw[0] aw eeprom batch write mode 1fh
[AK8998/w/d] msxxxxx-e-00 - 38 - 2011/12 note 1) lower line of each data represents the factor y settings written to eeprom. note 2) access to the reserved addresses is prohibited . note 3) write "0" to the unused d[7:0]. note 4) for a packaged device, registers marked with * a re adjusted before shipment. therefore, defaults are not "0". 5.2) control register (volatile memory) map data note 1) name content address (hex) d7 d6 d5 d4 d3 d2 d1 d0 am[3] am[2] am[1] am[0] cm1 adjustment mode 00h 0 0 0 0 ct[7] ct[6] ct[5] ct[4] ct[3] ct[2] ct[1] ct[0] cm2 osc variable ratio note4) 01h 0 0 0 0 0 0 0 0 sh1[3] sh1[3] sh1 s/h circuit output error adjustment 1 19h 0 0 sh2[5] sh2[4] sh2[2] sh2 s/h circuit output error adjustment 2 10h 0 0 0 sh3[6] sh3 s/h circuit output error adjustment 3 12h 0 sh4[3] sh4 s/h circuit output error adjustment 4 17h 0 reserved others note 1) lower line of each data represents the contro l register data upon power-up. note 2) access to the reserved addresses is prohibited . note 3) write "0" to the unused d[7:0]. note 4) access to this register serves as readonly. 6) eeprom and control register description 6.1) description of eeprom 6.1.1) adjustment section eeprom offset and span adjustment should be made after mea surement mode setup and adjustment of the reference generator section including vref, iref, o sc and vtmp.
[AK8998/w/d] msxxxxx-e-00 - 39 - 2011/12 a) offset voltage adjustment (eeprom names: ocr, oc f) rough adjustment should be performed first, followe d by a fine adjustment for the offset voltage. the content of the adjustment eeproms are shown her e. a-1) offset voltage rough adjustment (ocr) the offset voltage is adjusted roughly. the offset adjustment voltage varies ratiometricall y with respect to the supply voltage. the ratio in the table below is benchmarked to a vout output of 4800 mv (@vdd: 5v) as 100% (ratio = (offset voltage @vdd: 5v)/4800[mv]*100[%]). address : 00 hex d[3:0]=eocr[3:0] eocr [2:0] ratio vdd:3v vdd:5v dec hex bin (%) eocr [3]=0 (mv) eocr [3]=1 (mv) eocr [3]=0 (mv) eocr [3]=1 (mv) comments 0 0 000 0.00 0 0 0 0 default 1 1 001 33.33 800 -800 1600 -1600 2 2 010 66.67 1600 -1600 3200 -3200 3 3 011 100.00 2400 -2400 4800 -4800 4 4 100 133.33 3200 -3200 6400 -6400 5 5 101 166.67 4000 -4000 8000 -8000 6 6 110 200.00 4800 -4800 9600 -9600 7 7 111 233.33 5600 -5600 11200 -11200 a-2) offset voltage fine adjustment (ocf) the offset voltage is adjusted finely. the offset adjustment voltage varies ratiometricall y with respect to the supply voltage. the ratio in the table below is benchmarked to a vout output of 4800mv (@vdd: 5v) as 100% (ratio = (offset voltage @vdd: 5v)/4800[mv]*100[%]). address : 01hex d[7:0]=eocf[7:0] eocf [6:0] ratio vdd:3v vdd:5v dec hex bin (%) eocf [7]=0 (mv) eocf [7]=1 (mv) eocf [7]=0 (mv) eocf [7]=1 (mv) comments 0 00 0000000 0 0 0 0 0 default 1 01 0000001 0.17 4 -4 8 -8 15 0f 0001111 2.50 60 -60 120 -120 16 10 0010000 2.67 64 -64 128 -128 31 1f 0011111 5.17 124 -124 248 -248 32 20 0100000 5.33 128 -128 256 -256 63 3f 0111111 10.50 252 -252 504 -504 64 40 1000000 10.67 256 -256 512 -512 126 7e 1111110 21.00 504 -504 1008 -1008 127 7f 1111111 21.17 508 -508 1016 -1016
[AK8998/w/d] msxxxxx-e-00 - 40 - 2011/12 b) output span voltage adjustment (eeprom name sc) the span voltage is adjusted. the magnification factor in this table represents an adjustment factor benchmarked to a vout output of 4800mv (@vdd: 5v) as 1 (factor) = 100[%]/100[%]. the output and sensitivity describes the adjustable output voltages with the assumed reference output (2400mv@vdd: 3v, 4800mv@vdd: 5v) when esc[7: 0] = 0 dec. address : 02 hex d[7:0]=esc[7:0] esc[7:0] magnification vdd:3v vdd:5v dec hex bin (factor) output (mv) sens. (factor) output (mv) sens. (factor) comments 0 00 00000000 100/100.00 2400 60.0 4800 60.0 default 1 01 00000001 100/100.25 2394 59.9 4788 59.9 2 02 00000010 100/100.50 2388 59.7 4776 59.7 3 03 00000011 100/100.75 2382 59.6 4764 59.6 4 04 00000100 100/101.00 2376 59.4 4752 59.4 123 7b 01111011 100/130.75 1836 45.9 3671 45.9 124 7c 01111100 100/131.00 1832 45.8 3664 45.8 125 7d 01111101 100/131.25 1829 45.7 3657 45.7 126 7e 01111110 100/131.50 1825 45.6 3650 45.6 127 7f 01111111 100/131.75 1822 45.5 3643 45.5 128 80 10000000 100/132.00 1818 45.5 3636 45.5 center 129 81 10000001 100/132.25 1815 45.4 3629 45.4 130 82 10000010 100/132.50 1811 45.3 3623 45.3 131 83 10000011 100/132.75 1808 45.2 3616 45.2 132 84 10000100 100/133.00 1805 45.1 3609 45.1 133 85 10000101 100/133.25 1801 45.0 3602 45.0 251 fb 11111011 100/162.75 1475 36.9 2949 36.9 252 fc 11111100 100/163.00 1472 36.8 2945 36.8 253 fd 11111101 100/163.25 1470 36.8 2940 36.8 254 fe 11111110 100/163.50 1468 36.7 2936 36.7 255 ff 11111111 100/163.75 1466 36.6 2931 36.6
[AK8998/w/d] msxxxxx-e-00 - 41 - 2011/12 c) offset voltage temperature drift adjustment (eep rom name: ot) the offset voltage temperature drift for the pressure sensor is adjusted, including the AK8998 internal error. after performing the offset voltage adjustment at 25 c, use the eeprom's offset voltage temperature characteristic coefficients for adjustment so that the absolute values of the ak899 8's coefficient are matched to those of the sensor's coefficient. address : 03 hex - 04 hex d[8:0]=eot[8:0] eot[7:0] ratio vdd:3v vdd:5v dec hex bin ( % ) eot [8]=0 (mv/ c) eot [8]=1 (mv/ c) eot [8]=0 (mv/ c) eot [8]=1 (mv/ c) comments 0 00 00000000 0.00 0.000 0.000 0.000 0.000 default 1 01 00000001 0.39 0.087 -0.087 0.144 -0.144 2 02 00000010 0.78 0.173 -0.173 0.289 -0.289 3 03 00000011 1.18 0.260 -0.260 0.433 -0.433 4 04 00000100 1.57 0.346 -0.346 0.577 -0.577 122 7a 01111010 47.84 10.564 -10.564 17.606 -17.606 123 7b 01111011 48.24 10.650 -10.650 17.751 -17.751 126 7e 01111110 49.41 10.910 -10.910 18.184 -18.184 127 7f 01111111 49.80 10.997 -10.997 18.328 -18.328 128 80 10000000 50.20 11.083 -11.083 18.472 -18.472 129 81 10000001 50.59 11.170 -11.170 18.616 -18.616 130 82 10000010 50.98 11.256 -11.256 18.761 -18.761 131 83 10000011 51.37 11.343 -11.343 18.905 -18.905 132 84 10000100 51.76 11.430 -11.430 19.049 -19.049 133 85 10000101 52.16 11.516 -11.516 19.194 -19.194 236 ec 11101100 92.55 20.435 -20.435 34.058 -34.058 237 ed 11101101 92.94 20.521 -20.521 34.202 -34.202 238 ee 11101110 93.33 20.608 -20.608 34.347 -34.347 239 ef 11101111 93.73 20.695 -20.695 34.491 -34.491 255 ff 11111111 100.00 22.080 -22.080 36.800 -36.800 d) sensitivity temperature drift adjustment range change (eepro m name: estc) the adjustment range of the sensitivity temperature drift coefficient is changed. by setting the sensitivity temperature drift coeffi cient adjustment range (estc [0]) as "h", the sensitivity temperature drift coefficient adjustmen t range will be set from +2500 ppm/ c to -4000ppm/ c. by setting "l" is used, it will be set from +100 0 ppm/ c to -2500 ppm/ c. address : 13 hex d[0]= estc[0] d[0] symbol mode setup d[0] estc[0] sensitivity temperature drift adjustment range change 0 st25 sensitivity temperature drift adjustment range : -2500ppm/ c to +1000ppm/ c (default) 1 st40 sensitivity temperature drift adjustment range : -4000ppm/ c to +2500ppm/ c
[AK8998/w/d] msxxxxx-e-00 - 42 - 2011/12 e) sensitivity temperature drift adjustment (eeprom name: st) the sensitivity temperature drift for the pressure sensor is adj usted, including the AK8998 internal error. after performing the span voltage adjustment at 25o c, use the eeprom's sensitivity temperature drift coefficients for adjustment so th at the absolute values of the AK8998's coefficient are matched to those of the sensor's co efficient. address : 05 hex - 06 hex d[8:0]=est[8:0] est[7:0] ratio vdd:3v vdd:5v dec hex bin ( % ) est [8]=0 (ppm/ c) est [8]=1 (ppm/ c) est [8]=0 (ppm/ c) est [8]=1 (ppm/ c) comments 0 0 00000000 0.00 0 0 0 0 default 1 1 00000001 0.39 18 -18 18 -18 2 2 00000010 0.78 36 -36 36 -36 25 19 00011001 9.80 451 -451 451 -451 26 1a 00011010 10.20 469 -469 469 -469 27 1b 00011011 10.59 487 -487 487 -487 28 1c 00011100 10.98 505 -505 505 -505 137 89 10001001 53.73 2471 -2471 2471 -2471 138 8a 10001010 54.12 2489 -2489 2489 -2489 139 8b 10001011 54.51 2507 -2507 2507 -2507 140 8c 10001100 54.90 2525 -2525 2525 -2525 220 dc 11011100 86.27 3969 -3969 3969 -3969 221 dd 11011101 86.67 3987 -3987 3987 -3987 222 de 11011110 87.06 4005 -4005 4005 -4005 223 df 11011111 87.45 4023 -4023 4023 -4023 254 fe 11111110 99.61 4582 -4582 4582 -4582 255 ff 11111111 100.00 4600 -4600 4600 -4600 note) when estc[0] is set to 1hex, adjust in -4000 ppm/ c to +2500 ppm/ c . when estc[0] is set to 0hex, adjust in -2500ppm/ c to +1000 ppm/ c .
[AK8998/w/d] msxxxxx-e-00 - 43 - 2011/12 f) pressure detector 1 (eeprom name: pth1, hys1) the operating mode, the detection threshold values and the hysteresis voltage of the comparator for the pressure detector 1 are individually set up . the detector threshold voltage varies and the hyste resis voltage ratiometrically with respect to the supply voltage. f-1) pressure detector operating mode setup address : 07 hex d[7:5] = einv1[0], eine1[0], ein1 l[0] d[7:5] symbol mode setup d[7] einv1[0] pressure detector output polarity set up eeprom 0 einv11 high output when detected (default) 1 einv10 low output when detected d[6] eine1[0] pressure detector enabled setup eepro m 0 int1e pressure detector 1 enable (default) 1 int1d pressure detector 1 disable d[5] ein1l[0] pressure detector 1 detection thresho ld setup eeprom 0 int1< detect pressure above threshold (default) 1 int1> detect pressure below threshold address : 09 hex d[7] = epth1[0] d[7] symbol mode setup d[7] epth1[0] pressure detector 1 detection threshold selection eeprom 0 pth1r eeprom setup (default) 1 pth1e det2/pth pin external setup f-2) pressure detector detection threshold adjustme nt address : 07 hex d[4:0]=ept1[4:0] ept1[4:0] detection threshold (v) dec hex bin detect threshold ex. vdd:5v comments -16 10 10000 0.900*vdd 4.500 -15 11 10001 0.875*vdd 4.375 -14 12 10010 0.850*vdd 4.250 -3 1d 11101 0.575*vdd 2.875 -2 1e 11110 0.550*vdd 2.750 -1 1f 11111 0.525*vdd 2.625 0 00 00000 0.500*vdd 2.500 default 1 01 00001 0.475*vdd 2.375 2 02 00010 0.450*vdd 2.250 14 0e 01110 0.150*vdd 0.750 15 0f 01111 0.125*vdd 0.625 f-3) comparator hysteresis voltage adjustment for p ressure detection address : 09 hex d[1:0]=ehys1[1:0] ehys1[1:0] hysteresis voltage (mv) dec hex bin hysteresis voltage ex. vdd:5v comments 2 2 10 0.030*vdd 150.0 3 3 11 0.040*vdd 200.0 0 0 00 0.050*vdd 250.0 default 1 1 01 0.060*vdd 300.0
[AK8998/w/d] msxxxxx-e-00 - 44 - 2011/12 g) pressure detector 2 (eeprom name: pth2, hys2) the operating mode, the detection threshold values and the hysteresis voltage of the comparator for the pressure detector 2 are individually set up . the detector threshold voltage varies and the hyste resis voltage ratiometrically with respect to the supply voltage. g-1) pressure detector operating mode setup address : 08 hex d[7:5] = einv2[0], eine2[0], ein2 l[0] d[7:5] symbol mode setup d[7] einv2[0] pressure detector output polarity set up eeprom 0 einv21 high output when detected (default) 1 einv20 low output when detected d[6] eine2[0] pressure detector enabled setup eepro m 0 int2e pressure detector 2 enable (default) 1 int2d pressure detector 2 disable d[5] ein2l[0] pressure detector 2 detection thresho ld setup eeprom 0 int2< detect pressure above threshold (default) 1 int2> detect pressure below threshold g-2) pressure detector detection threshold adjustme nt address : 08 hex d[4:0]=ept2[4:0] ept2[4:0] detection threshold (v) dec hex bin detect threshold ex. vdd:5v comments -16 10 10000 0.900*vdd 4.500 -15 11 10001 0.875*vdd 4.375 -14 12 10010 0.850*vdd 4.250 -3 1d 11101 0.575*vdd 2.875 -2 1e 11110 0.550*vdd 2.750 -1 1f 11111 0.525*vdd 2.625 0 00 00000 0.500*vdd 2.500 default 1 01 00001 0.475*vdd 2.375 2 02 00010 0.450*vdd 2.250 13 0d 01101 0.175*vdd 0.875 14 0e 01110 0.150*vdd 0.750 15 0f 01111 0.125*vdd 0.625 g-3) comparator hysteresis voltage adjustment for p ressure detection address : 09 hex d[3:2]=ehys2[1:0] ehys2[1:0] hysteresis voltage (mv) dec hex bin hysteresis voltage ex. vdd:5v comments 2 2 10 0.030*vdd 150.0 3 3 11 0.040*vdd 200.0 0 0 00 0.050*vdd 250.0 default 1 1 01 0.060*vdd 300.0
[AK8998/w/d] msxxxxx-e-00 - 45 - 2011/12 h) output reference voltage adjustment (eeprom name s: lvs, lv) adjusts the output reference voltage. the content of the adjustment eeproms is shown here . address : 0a hex - 0b hex d[8:0]=elv[8:0] elv[7:0] vout pin (x vdd) comments dec hex bin elv[8]=0h elv[8]=1h 0 00 00000000 0.500 0.500 default 1 01 00000001 0.498 0.502 2 02 00000010 0.496 0.504 3 03 00000011 0.494 0.506 4 04 00000100 0.492 0.508 124 7c 01111100 0.252 0.748 125 7d 01111101 0.250 0.750 126 7e 01111110 0.248 0.752 127 7f 01111111 0.246 0.754 128 80 10000000 0.244 0.756 240 f0 11110000 0.020 0.980 241 f1 11110001 0.018 0.982 242 f2 11110010 0.016 0.984 243 f3 11110011 0.014 0.986 250 fa 11111010 0.000 1.000 251 fb 11111011 0.000 1.000 252 fc 11111100 0.000 1.000 253 fd 11111101 0.000 1.000 254 fe 11111110 0.000 1.000 255 ff 11111111 0.000 1.000
[AK8998/w/d] msxxxxx-e-00 - 46 - 2011/12 i) input gain adjustment (eeprom name: ing) eeprom for setting the total gain. the input gain is adjusted according to the full-sc ale voltage of the pressure sensor. i-1) sensitivity temperature drift adj. range: -400 0ppm/ c to +2500ppm/ c (estc[0]=1h) address : 0c hex d[4:0]=eig[4:0] eig[3:0] total gain (times) dec hex bin g1 gain (times) eig[4]=0 g2: 3x eig[4]=1 g2: 1.5x comments 0 0 0000 70.0 210.0 105.0 default 1 1 0001 60.0 180.0 90.0 2 2 0010 50.0 150.0 75.0 3 3 0011 40.0 120.0 60.0 4 4 0100 35.0 105.0 52.5 5 5 0101 30.0 90.0 45.0 6 6 0110 25.0 75.0 37.5 7 7 0111 20.0 60.0 30.0 8 8 1000 15.0 45.0 22.5 9 9 1001 12.0 36.0 18.0 10 a 1010 10.0 30.0 15.0 11 b 1011 7.0 21.0 10.5 12 c 1100 5.0 15.0 7.5 13 d 1101 14 e 1110 15 f 1111 setup prohibited setup prohibited setup prohibited i-2) sensitivity temperature drift adj. range: -250 0ppm/ c to +1000ppm/ c (estc[0]=0h) address : 0c hex d[4:0]=eig[4:0] eig[3:0] total gain (times) dec hex bin g1 gain (times) eig[4]=0 g2: 2.352x eig[4]=1 g2: 1.176x comments 0 0 0000 70.0 164.7 82.4 ? 1 1 0001 60.0 141.2 70.6 2 2 0010 50.0 117.6 58.8 3 3 0011 40.0 94.1 47.1 4 4 0100 35.0 82.4 41.2 5 5 0101 30.0 70.6 35.3 6 6 0110 25.0 58.8 29.4 7 7 0111 20.0 47.1 23.5 8 8 1000 15.0 35.3 17.6 9 9 1001 12.0 28.2 14.1 10 a 1010 10.0 23.5 11.8 11 b 1011 7.0 16.5 8.2 12 c 1100 5.0 11.8 5.9 13 d 1101 14 e 1110 15 f 1111 setup prohibited setup prohibited setup prohibited
[AK8998/w/d] msxxxxx-e-00 - 47 - 2011/12 j) measurement mode setup (eeprom name: mm) eeprom is used for setting up the measurement mode for the AK8998. a setup of a sampling frequency, supply voltage & s ensor drive voltage, the enable / disable of internal scf & smf, the internal / external of a te mperature sensor, and the internal switching of vp & vn can be performed. address : 0d hex d[7:0]= eagnd[0], evpn[0], etmp[0 ], escf[1:0], evd[1:0], esf[0] d[7:0] symbol mode setup d[7] eagnd[0] agnd pin setup eeprom 0 agndd agnd pin disable (default) 1 agnde agnd pin enable d[6] evpn[0] vp & vn internal switching eeprom 0 vpnn vp->vp, vn->vn (default) 1 vpnr vp->vn, vn->vp d[5] etmp[0] temperature sensor internal & external change eeprom 0 tmpe external temperature sensor use (default) *cannot be used in sampling frequency as 1khz (esf[ 0]=1h). 1 tmpi internal temperature sensor use d[4:3] escf[1:0] internal scf & smf setup eeprom 00 scds internal scf & smf disable (default) 01 scen1 internal scf & smf enable & cutoff frequency 1khz 10 scen2 internal scf & smf enable & cutoff frequency 500hz 11 scen3 internal scf & smf enable & cutoff frequency 250hz d[2:1] evd[1:0] supply voltage & sensor drive voltage setu p eeprom 00 vdd504 supply voltage at 5v & sensor drive voltage at 4v (default) 01 vdd502 supply voltage at 5v & sensor drive voltage at 2.2v 10 vdd332 supply voltage at 3.3v & sensor drive voltag e at 2.2v 11 vdd302 supply voltage at 3v & sensor drive voltage at 2.2v d[0] esf[0] sampling frequency setup eeprom 0 sf10 sampling frequency 10khz (default) 1 sf1 sampling frequency 1khz *cannot be used at the time of external temperature sensor is used (etmp[0]=0h).
[AK8998/w/d] msxxxxx-e-00 - 48 - 2011/12 6.1.2) reference voltage generator eeprom k) vref voltage adjustment (eeprom name: vref) eeprom for adjusting the AK8998 reference voltage. perform an adjustment to attain the reference voltage of 1000 mv (see recommended connection examples for components). ?vref3/5 in the table below indicates a value varyi ng with the setup values of the eeprom. ?vs3/5 represents the values of ?vref3/5 multiplied by two and four, respectively. the ratio is benchmarked to 1000mv (vref ideal value) as 100% (r atio = (?vref3/5) /1000[mv]*100[%]). address : 0e hex d[2:0]=evr[2:0] evr[2:0] ratio vdd: 3v, 3.3v mode vdd:5v dec hex bin ( % ) ? vref3 (mv) ? vs3 (mv) ? vref5 (mv) ? vs5 (mv) comments -4 4 100 -4 -40 -80 -40 -160 -3 5 101 -3 -30 -60 -30 -120 -2 6 110 -2 -20 -40 -20 -80 -1 7 111 -1 -10 -20 -10 -40 0 0 000 0 0 0 0 0 default 1 1 001 1 +10 +20 +10 +40 2 2 010 2 +20 +40 +20 +80 3 3 011 3 +30 +60 +30 +120 l) iref current adjustment (eeprom name: iref) eeprom for adjusting the AK8998 reference current. the external resistor (1m ) is connected to vout pin. reference current is supplied to external resistor, and it adjusts so that the voltage across the both ends of external resistor may be set to 1.0v (see recommended connection examples for components). iref in the table below indicates a current value w ith the setup values of the eeprom. viref (=iref*1[m?]) is a voltage value varying with the external resistanc e (1m?) at the time of adjustment. the ratio is benchmarked to 1.0a (iref ideal value) as 100% (ratio = (iref-1.0 [a])/1.0 [a]*100[%]). address : 0f hex d[3:0]=eir[3:0] eir[3:0] ratio iref viref dec hex bin ( % ) (a) (v) comments -8 8 1000 -17.0 0.830 0.830 -7 9 1001 -15.2 0.848 0.848 -6 a 1010 -13.4 0.866 0.866 -5 b 1011 -11.5 0.885 0.885 -4 c 1100 -9.5 0.905 0.905 -3 d 1101 -7.3 0.927 0.927 -2 e 1110 -5.0 0.950 0.950 -1 f 1111 -2.6 0.974 0.974 0 0 0000 0.0 1.000 1.000 default 1 1 0001 2.8 1.028 1.028 2 2 0010 5.7 1.057 1.057 3 3 0011 8.8 1.088 1.088 4 4 0100 12.2 1.122 1.122 5 5 0101 15.9 1.159 1.159 6 6 0110 19.8 1.198 1.198 7 7 0111 24.1 1.241 1.241
[AK8998/w/d] msxxxxx-e-00 - 49 - 2011/12 m) osc frequency adjustment (eeprom name: osc) eeprom for adjusting the AK8998 operation clock. pe rform an adjustment to attain a frequency of 1000khz. reading the ratio data from the osc var iable ratio register (ct[7:0]), the adjustment data of the osc frequency adjustment eerpom is calc ulated. frequency ?f in the table below indicates a value v arying with the setup values of the eeprom. the ratio is benchmarked to 1.000khz (osc ideal value) as 100% (ratio = frequency ?f /( frequency ?f+1000[khz])*100[%]). address : 10 hex d[3:0]=efr[3:0] efr[3:0] ratio frequency ?f dec hex bin ( % ) (khz) comments -5 b 1011 -34 -251 -4 c 1100 -25 -197 -3 d 1101 -17 -146 -2 e 1110 -11 -99 -1 f 1111 -5 -52 0 0 0000 0 0 default 1 1 0001 5 49 2 2 0010 10 106 3 3 0011 14 162 4 4 0100 18 224 5 5 0101 22 274 6 6 0110 25 329 7 7 0111 28 384 note1) hex 8 to a are prohibited for setup.
[AK8998/w/d] msxxxxx-e-00 - 50 - 2011/12 n) vtmp voltage adjustment (eeprom name: vtmp) compensates the offset values for the AK8998's inte rnal temperature sensor and external temperature sensor. adjusts the values so that the difference between vtmp voltage and vref voltage is close to 0 mv (if vref is 1005mv, adjust so that vtmp is also 1005mv). the rough adjustment (etm[8:6]) is invalid when the internal temperature sensor is used (etmp[0]=h). the rough adjustment is effective wh en the external temperature sensor is used (etmp[0]=l). ?vtmp in the table below indicates a value varying with the setup values of the eeprom. the ratio is benchmarked to 1000mv (vref ideal value) as 100% (ratio = ?vtmp/1000[mv] *100[%]). address : 11 hex d[5:0]=etm[5:0] etm[5:0] ratio ?vtmp dec hex bin ( % ) (mv) comments -32 20 100000 +6.4 +64 .. -16 30 110000 +3.2 +32 .. -8 38 111000 +1.6 +16 .. -4 3c 111100 +0.8 +8 .. -1 3f 111111 +0.2 +2 0 00 000000 0.0 0 default 1 01 000001 -0.2 -2 .. 4 04 000100 -0.8 -8 .. 8 08 001000 -1.6 -16 .. 16 10 010000 -3.2 -32 .. 31 1f 011111 -6.2 -62 address : 11 hex d[7:6]=etm[7:6], 13 hex d[1]=etm[8 ] etm[8:6] ratio ?vtmp dec hex bin ( % ) (mv) comments 4 4 100 setup prohibited setup prohibited 5 5 101 setup prohibited setup prohibited 6 6 110 +17.0 +170 7 7 111 +8.5 +85 0 0 000 0.0 0 default 1 1 001 -8.5 -85 2 2 010 -17.0 -170 3 3 011 setup prohibited setup prohibited
[AK8998/w/d] msxxxxx-e-00 - 51 - 2011/12 o) user-writable data space (eeprom name: ue) free area (eeprom) available to the user. address : 12 hex d[7:0]=eue[7:0] data name content address d7 d6 d5 d4 d3 d2 d1 d0 ue user-writable data 12 hex eue7 eue6 eue5 eue4 eue3 eue2 eue1 eue0 default 0 0 0 0 0 0 0 0 p) control register access setup (eeprom name: mm2) the access setup to the control register (volatile memor y) is performed. when the control register access setup is disabled (etst[0]=0h), the control register (c address: 00h) is fixed to the initial value, and ca nnot be accessed, unless control register access is validated. address : 1d hex d[0]= etst[0] d[0] symbol mode setup d[0] etst[0] control register access setup 0 tstds control register access disable(default) 1 tsten control register access enable q) eeprom write enable setup (eeprom name:ewe) the eeprom write enable setup is performed. when the setup of eeprom write enable is validated (ewe[0]=1h), the writing to eeprom is permitted. if it is invalid, the writing to eeprom other then eeprom write enable (address: 00 -1dh, 1fh) becomes impossible. and this address can not be written by batch writing. however, eeprom read (all the addresses) is possible even in that case. address : 1e hex d[0]= ewe[0] d[0] symbol mode setup d[0] ewe[0] eeprom write enable setup 0 weds eeprom write disable (default) 1 ween eeprom write enable r) eeprom batch write mode (eeprom name: aw) initializes the addresses 00 hex to 1d hex in the e eprom map at once or writes identical data. this address is not available in the eeprom. address : 1f hex d[7:0]=eaw[7:0] data name content address d7 d6 d5 d4 d3 d2 d1 d0 aw eeprom batch write 1f hex eaw7 eaw6 eaw5 eaw4 eaw3 eaw2 eaw1 eaw0
[AK8998/w/d] msxxxxx-e-00 - 52 - 2011/12 6.2) description of control register (volatile memory) a) adjustment mode (register name: cm1) this register is used to adjust the AK8998 referenc e voltage and pressure sensor's offset, span, offset temperature drift and sensitivity temp erature drift including those of the AK8998. in addition, the value of the register returns to t he initial value on the following conditions. at the power up when csclk=low is maintained 0.5msec or more when etst[0] is set to "l" address : 00 hex d[3:0]=am[3:0] (this is not a nonvolatile eeprom, but a volatile register.) d[7:0] symbol mode setup description d[7:4] reserved d[3:0] am[3:0] ic adjustment mode 0000 (default) 0001 avr vref adjustment the vref voltage is output at the vout pin. 0010 air iref adjustment the iref current is output at the vout pin. 0011 afr osc adjustment input the fixed period of high level (2.0msec) from the csclk pin. the count value in the internal counter is stored in the register. 0100 ato vtmp adjustment the vtmp voltage is output at the vout pin. adjust this voltage so that it matches the vref voltage at 25 c. 0101 adt1 judge threshold 1 adjustment the internally set judge threshold value 1 is outpu t at the vout pin. 0110 adt2 judge threshold 2 adjustment the internally set judge threshold value 2 is outpu t at the vout pin. 0111 ahy1 hysteresis voltage 1 the hysteresis voltage of the comparator 1 is output at the vout pin. 1000 ahy2 hysteresis voltage 2 the hysteresis voltage of the comparator 2 is output at the vout pin. 1001- 1111 reserved
[AK8998/w/d] msxxxxx-e-00 - 53 - 2011/12 b) osc variable ratio storing register (register na me: cm2) it is used for adjustment of the oscillator frequen cy of AK8998. the counted value in the internal counter is stored. since the internal counter is overflowing when a co unt value shows ff hex, measure again by re-defining high level per iod. this register is readonly. in addition, the value o f the register returns to the initial value on the following conditions. at the power up when cm1 register is written when csclk=low is maintained 0.5msec or more when etst[0] is set to "l" address : 01 hex d[7:0]=ct[7:0] (this is not a nonvolatile eeprom, but a volatile r egister.) c) s/h circuit output error adjustment register (register name: s h1 to sh4) it is used for adjustment of the s/h circuit output error of AK8998. the value of the register returns to the initial va lue on the following conditions. at the power up when csclk=low is maintained 0.5msec or more it is necessary to set up a register in order of the following. (this is not a nonvolatile eeprom, but a volatile r egister.) no. register name address data comments 1 sh1 19hex 0ahex 2 sh2 10hex 34hex 3 sh3 12hex 40hex 4 sh4 17hex 08hex note) other data is prohibited for setup. ct[7:0] count value ratio comments dec hex bin (time) % 0 00 00000000 0 0 default 1 01 00000001 1 -99 98 62 01100010 98 -2 99 63 01100011 99 -1 100 64 01100100 100 0 ideal value 101 65 01100101 101 1 102 66 01100110 102 2 254 fe 11111110 254 154 255 ff 11111111 - - counter error
[AK8998/w/d] msxxxxx-e-00 - 54 - 2011/12 recommended connection examples for components 1) vo pin connection example 0 f C 3 f inside AK8998/w/d vo 146.kohm vout buffer& smf 2) power supply pin connection example 1.0 f 10 % vss vdd insideAK8998/w/d agnd 10nf 10 % 3) vout pin connection examples for adjustment inside AK8998/w/d 1k iref vout control register (air) voltage meter 1m 2) iref adjustment 3) vtmp adjustment inside AK8998/w/d 1k vref etc. vout control register (avr etc.) voltage meter 1) vref etc. adjustment 1m 3-1) internal temp. sensor inside AK8998/w/d 1k vtmp vout control register (ato) voltage meter extmp 1m 3-2) external temp. sensor inside AK8998/w/d 1k vtmp vout control register (ato) voltage meter extmp eeprom register (tmpe) 1m vs
[AK8998/w/d] msxxxxx-e-00 - 55 - 2011/12 package information 1. marking 2. external dimensions the rear-side tab is recommended to be mounted on the substrate to ensure strength. do not connect to the power supply, gnd or any signal. (1) 8 9 9 8 x 1 x 2 x 3 (3) (2) (1) pin number 1 indication mark 1 5 13 9 (2) part number (3) date code (3 digits) [detail a]
[AK8998/w/d] msxxxxx-e-00 - 56 - 2011/12 important notice ? these products and their specifications are subject to change without notice. when you consi der any use or application of these products, please make inquiries the sales office of asahi k asei microdevices corporation (akm) or authorized distributors as to current status of the products. ? descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of t he semiconductor products. you are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments . akm assumes no responsibility for any losses incurred by you or third parties arisi ng from the use of these information herein. akm assumes no liability for infringement of any patent, intell ectual property, or other rights in the application or use of such information contained herein. ? any export of these products, or devices or systems containing them, may requir e an export license or other official approval under the law and regulations of the country of export pertaining to cus toms and tariffs, currency exchange, or strategic materials. ? akm products are neither intended nor authorized for use as critical componentsnote1) i n any safety, life support, or other hazard related device or systemnote2), and akm assumes no respons ibility for such use, except for the use approved with the express written consent by representative d irector of akm. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in l oss of life or in significant injury or damage to person or property. ? it is the responsibility of the buyer or distributor of akm products, who di stributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibilit y and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.

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